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Vulnerabilities and CHIPSEC Modules

johnloucaides edited this page 2017-04-11 14:55:49 -07:00

When checking for known vulnerabilities, CHIPSEC test modules return standard values that can be interpreted as follows:

Result	Meaning
PASSED	We have detected the mitigation to a known vulnerability
FAILED	We have detected a known vulnerability
WARNING	We have detected something that could be a vulnerability but manual analysis is required to confirm. (Inconclusive)
SKIPPED	N/A because either we did not port the test to this platform or because it does not apply to the system at all
ERROR	Something went wrong in the execution of CHIPSEC

Known vulnerabilities can be mapped to CHIPSEC modules as follows:

Attack Surface / Vector	Vulnerability Description	CHIPSEC Module	Example
Firmware protections in ROM
	SMI event configuration is not locked	common.bios_smi
	SPI flash descriptor is not protected	common.spi_desc
	SPI controller security override is enabled	common.spi_fdopss
	SPI flash controller is not locked	common.spi_lock
	Device-specific SPI flash protection is not used	chipsec_util spi write (manual analysis)
	SMM BIOS write protection is not correctly used	common.bios_wp
	Flash protected ranges do not protect bios region	common.bios_wp
	BIOS interface is not locked	common.bios_ts
	SMI configuration is not locked (SMI race condition)	common.smi_lock
Runtime protection of SMRAM
	Compatability SMRAM is not locked	common.smm
	SMM cache attack	common.smrr
	Memory remapping vulnerability in SMM protection	remap
	DMA protections of SMRAM are not in use	smm_dma
	Graphics aperture redirection of SMRAM	chipsec_util memconfig remap
	Memory sinkhole vulnerability	tools.cpu.sinkhole
Secure boot	Incorrect protection of secure boot configuration
	Root certificate	common.bios_wp, common.secureboot.variables
	Key exchange keys and whitelist/blacklist	common.secureboot.variables
	Controls in setup variable (CSM enable/disable, image verification policies, secure boot enable/disable, clear/restore keys)	chipsec_util uefi var-find Setup
	TE header confusion	tools.secureboot.te
	UEFI NVRAM is not write protected	common.bios_wp
	Insecure handling of secure boot disable	chipsec_util uefi var-list
Persistent firmware configuration
	Secure boot configuration is stored in unprotected variable	common.secureboot.variables, chipsec_util uefi var-list
	Variable permissions are not set according to specification	common.uefi.access_uefispec
	Sensitive data (like passwords) are stored in uefi variables	chipsec_util uefi var-list (manual analysis)
	Firmware doesn't sanitize pointers/addresses stored in variables	chipsec_util uefi var-list (manual analysis)
	Firmware hangs on invalid variable content	chipsec_util uefi var-write, chipsec_util uefi var-delete (manual analysis)
	Hardware configuration stored in unprotected variables	chipsec_util uefi var-list (manual analysis)
	Re-creating variables with less restrictive permissions	chipsec_util uefi var-write (manual analysis)
	Variable NVRAM overflow	chipsec_util uefi var-write (manual analysis)
	Critical configuration is stored in unprotected CMOS	chipsec_util cmos, common.rtclock
Platform hardware configuration
	Boot block top-swap mode is not locked	common.bios_ts
	Architectural features not locked	common.ia32cfg
	Memory mamp is not locked	memconfig
	IOMMU usage	chipsec_util iommu
	Memory remapping is not locked	remap
Runtime firmware (eg. SMI handlers)
	SMI handlers use pointers/addresses from OS without validation	tools.smm.smm_ptr
	Legacy SMI handlers call legacy BIOS outside SMRAM
	INT15 in legacy SMI handlers
	UEFI SMI handlers call UEFI services outside SMRAM
	Malicious CommBuffer pointer and contents
	Race condition during SMI handler
	Authenticated variables SMI handler is not implemented	chipsec_util uefi var-write
	SmmRuntime vulnerability	tools.uefi.blacklist
Boot time firmware
	Software vulnerabilities when parsing, decompressing, and loading data from ROM
	Software vulnerabilities in implementation of digital signature verification
	Pointers stored in UEFI variables and used during boot	chipsec_util uefi var-write
	Loading unsigned PCI option ROMs	chipsec_util pci xrom
	Boot hangs due to error condition (eg. ASSERT)
Power state transitions (eg. resume from sleep)
	Insufficient protection of S3 boot script table	common.uefi.s3bootscript, tools.uefi.s3script_modify
	Dispatch opcodes in S3 boot script call functions in unprotected memory	common.uefi.s3bootscript, tools.uefi.s3script_modify
	S3 boot script interpreter stored in unprotected memory
	Pointer to S3 boot script table in unprotected UEFI variable	common.uefi.s3bootscript, tools.uefi.s3script_modify
	Critical setting not recorded in S3 boot script table	chipsec_util uefi s3bootscript (manual analysis)
	OS waking vector in ACPI tables can be modified	chipsec_util acpi dump (manual analysis)
	Using pointers on S3 resume stored in unprotected UEFI variables	chipsec_util uefi var-write
Firmware update
	Software vulnerabilities when parsing firmware updates
	Unauthenticated firmware updates
	Runtime firmware update that can be interrupted
	Signature not checked on capsule update executable
Network interfaces
	Software vulnerabilities when handling messages over network interfaces
	Booting unauthenticated firmware over unprotected network interfaces
Misc
	BIOS keyboard buffer is not cleared during boot	common.bios_kbrd_buffer
	DMA attack from devices during firmware execution