da643fa3cb
Merge pull request #39 from rgov/mac
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Fix build on macOS
2016-09-07 11:57:28 -04:00
7c60cd3860
Build changes
2016-09-07 11:35:11 -04:00
d755a870cf
Added potential support for openSUSE builds
2016-09-03 16:06:41 -04:00
f283e05616
Added semantics and tests for CVTDQ2PD and CVTTPD2DQ
2016-09-01 20:57:39 -04:00
773919bd40
Added NOPs.
2016-08-31 20:46:02 -04:00
c7d9122e26
Updated binja script for simpler cfg protobuf format. Fixed X86/Arch.cpp to record x87 ST(n) regs as 64 bits. Updated llvm version to 3.8.1. Updated bootstrap to choose the release of the installed ubuntu version (mine is now 16.04, previously 14.04).
2016-08-31 17:47:31 -04:00
5eef7ead59
Re-introducing cfg::Instr. Marked extern funcs as not builtin so that they won't conflict with builtins needed to implement fpu instructions. Updated the address translation to have the scale be signed, and to implement the displacement as an add for positive numbers, and a subtract for negative numbers.
2016-08-29 12:47:28 -04:00
1b012f75f3
Added tests for MOVQ. Starting implementation of FPU instructions and tests. Change how instruction lifting is done. The arch side of lifting is now separate from all bitcode concerns. remill/BC/Translator.cpp is now heavier weight in what it does.
2016-08-26 15:59:52 -04:00
d9ede09aa7
Add function references as indirect blocks
2016-08-08 17:08:47 -04:00
5380487bde
Add jump table entries as indirects
2016-08-08 17:08:47 -04:00
c08ca9f50f
Clean up how indirects are added
2016-08-08 17:08:47 -04:00
2e01103ded
Process instructions, create indirect blocks at terminators
2016-08-08 17:08:47 -04:00
497eac715e
Process basic blocks
2016-08-08 17:08:47 -04:00
8740835f78
Use update_analysis_and_wait
2016-08-08 17:08:47 -04:00
3e46dc0498
Add basic function processing
2016-08-08 17:08:47 -04:00
d6c94946e1
Add arguments
2016-08-08 17:08:47 -04:00
17da66e732
Create binja_get_cfg.py
2016-08-08 17:08:47 -04:00
ba427a3b4b
Starting to add some more FPU stuff, though untested. Decided on a simpler way of handling conversions between float80_ts and float64_ts. The idea is to just punt on float80_ts, with the idea that all sources of them will come via memory locations, or at attach/detach time.
2016-08-08 17:05:44 -04:00
81df2663d9
Changes to how conditional branches are handled. Made the x86 translator code even less OO. Removed the conditional_branch and create_program_counter intrinsics.
2016-08-08 17:05:44 -04:00
4a3307bc6c
Got all BITBYTE instructions and tests working.
2016-08-08 17:05:43 -04:00
8f8ed65af1
DATAXFER and BINARY tests are now passing.
2016-08-08 17:05:43 -04:00
a7c2d11ce5
In-progress, doesn't build, but shows where things are going and I wanted to back my changes up before my vacation.
2016-08-08 17:05:43 -04:00
9b4759a3d2
Set a default SDKROOT on Darwin
2016-07-28 21:55:32 -07:00
85f568f072
Fix test for existince of libxed on Darwin
2016-07-28 21:52:03 -07:00
0e249223cb
Don't run install_name_tool on libxed.a
2016-07-28 21:40:39 -07:00
b61450fe53
Add function references as indirect blocks
2016-07-05 11:19:44 -04:00
b62756dd6f
Add jump table entries as indirects
2016-07-05 11:07:19 -04:00
e69c448d69
Clean up how indirects are added
2016-07-05 10:51:43 -04:00
2810edb565
Process instructions, create indirect blocks at terminators
2016-06-30 15:13:27 -04:00
141c5566b1
Process basic blocks
2016-06-30 14:26:43 -04:00
0e9b69ede0
Use update_analysis_and_wait
2016-06-30 13:54:08 -04:00
d21fbd28b4
Add basic function processing
2016-06-29 18:18:42 -04:00
002dd06981
Add arguments
2016-06-29 14:54:51 -04:00
614973b68d
Create binja_get_cfg.py
2016-06-28 13:55:57 -04:00
3f815efcbd
Rename all references from mcsema2 to remill
2016-06-23 11:39:36 -04:00
10b5af884d
Fix to build system for dry runs.
2016-04-22 15:48:47 -04:00
fb5ac1bd6c
Very early FPU support. Changes to libOptimize. Added a libFinalize and a scripts/finalize_bitcode.sh to get around the issue of LLVM and dead arg elimination. This is annoying because I had to use the Naked attribute on all functions, but then this affects codegen, so the finalize step is needed to make sure that code is correctly compiled.
2016-04-08 16:35:48 -04:00
280c23b4b4
Changes to how vectors in memory are read. Cleaned up a bunch of the vector related operator code. Added some extra test cases for memory accesses. I plan to add more.
2016-04-01 18:24:37 -04:00
b5247b0fb0
Test cases for LEA, CPUID, and ENTER.
2016-03-22 13:16:23 -04:00
d74cbedfef
Added implementation and tests for MOVLPS. This turned out to require a new DownCast construct because the default implemented behaviour for assigning a small value/vector to a big vector is to zero out the high part of the vector.
2016-03-15 17:40:54 -04:00
414766d692
Change how temp file is created. Bump to clang+llvm 3.8.
2016-03-10 23:07:22 -05:00
e2ef455ddf
Minor fix to the register analysis that treats conditional writes as reads (I assumed there was a read operand in there), as it's an implicit data dependency and otherwise introduces undef values.
2016-03-08 20:13:06 -05:00
2bf82421f7
Fiddling with interrupt state. Need a vector value, and also needed extra State structure padding. Added -lowerswitch to optimize_bitcode.sh
2016-02-18 17:36:45 -05:00
94e5a9afe1
A few days of changes. First, some fixes in the dead flag/register analysis. It was slightly buggy. The trick was to split the live/dead tracking into two related bitsets that are updated in the same way. The first bitset, the register kill mask is used to mask the union of incoming live registers. This bitset is initially all set, then we update with revives/kills. As a mask, this ensures that certain things are killed. Then there's the revive set, which is initially unset then updated with revives/kills. This is ORed in, in order to ensure that specific flags are revived. This is more like the gen and kill sets in a typical data flow analysis.
...
The next big change was the introduction of seemingly useless volatile variables into the State structure between aithmetic flag bytes and general purpose registers. I observed that a lot of times LLVM would merge adjacent kills of flags into either a memset intrinsic or into a wider store. This is basically write combining, and these extra volatile fields ensure that writes to adjacent flags are independent. Ancedotally, this also helps dead store elimination.
The next change was to the optimizer plugin. Originally this did two things: first, remove calls to __mcsema_defer_inlining, and mark the callers of this function as having to always be inlined. This was to help dead flag elimination as a form of dead store elimination, because removing a pure callinst is fairly trivial. The next thing the optimizer did was replace all __mcsema_undefined_X intrinsics with Undef values. This was generally good but it didn't always do what I wanted. The resulting undef stores would sometimes be eliminated, and other times be replaced with 0-value stores. The latter is suboptimal. The new addition goes through all functions and removes stores of undef values.
2016-02-10 14:16:36 -05:00
2fec611914
Bumping XED version.
2016-02-08 14:54:13 -05:00
ee87b84d5e
Made is to that the memory intrinsics always read/write byval as opposed to byref for vectors.
2016-02-03 13:32:57 -05:00
09d71cada2
Improved flags analysis. Move the undefined optimization out into the plugin. Still have an issue where dead-store elimination is not happening :-(
2016-02-03 12:24:34 -05:00
5742f219e7
Minor fix.
2016-02-02 23:07:10 -05:00
24cc36e9e0
Tried to clean up a bit of code. Maybe didn't success so much. Added the beginnings of a data-flow analysis pass. It very aggressively marks condition codes as dead. Next step is to augment it to handle registers.
2016-02-02 22:46:23 -05:00
c98dfd7b51
Minor tweaks
2016-01-28 12:40:46 -05:00
Peter Goodman