mirror of
https://github.com/lifting-bits/sleigh
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fix-windows-ccache
357 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
 Eric Kilmer
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8243a7b4b4 |
Fix ccache for Windows in GitHub Actions
- Add TrackFileAccess=false to CMAKE_VS_GLOBALS in ccache-msvc.cmake to prevent MSBuild from tracking ccache files as build outputs - Move Windows ccache directory to %TEMP% to avoid Visual Studio's file tracking triggering unnecessary rebuilds - Update cache action path to use platform-specific locations Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com> |
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Eric Kilmer
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0664b5c545 | Dark-mode for index.html | ||
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Eric Kilmer
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cd6078bb22 | Publish both stable and HEAD docs to GitHub Pages | ||
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Eric Kilmer
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fc49d2340e |
Deploy Doxygen docs to GitHub Pages
https://lifting-bits.github.io/sleigh |
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auto-updater[bot]
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1df5e051d3 |
Update Ghidra HEAD to commit 549735683 (#387)
Bump Ghidra HEAD commit 549735683 Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/sleighbase.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.y M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.hh M Ghidra/Processors/RISCV/data/languages/riscv.opinion ``` Commit details: ``` [Commit 1/7] Hash: 6208df2d50d716b4faf87d3a0c0603d45aac4cb3 Date: 2026-01-13 10:44:59 -0500 Message: GP-1 Corrected RISCV import opinion file Files changed: M Ghidra/Processors/RISCV/data/languages/riscv.opinion [Commit 2/7] Hash: 1789bb9c5e66cb1e5ad2072b73c4bf7fbc713f67 Date: 2026-01-12 21:00:06 -0500 Message: GP-1 minor doc fix Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc [Commit 3/7] Hash: 7828f235d315807d18ecb873fad34b209a02ce65 Date: 2026-01-12 21:51:54 +0000 Message: GP-6316 Increase maximum temporary size for SLEIGH to 256 bytes Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/sleighbase.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh [Commit 4/7] Hash: 4830a7ab99548aa898e861b967f48c92dd741f48 Date: 2026-01-12 19:33:12 +0000 Message: GP-6314 Reset label counter for every named section Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.y [Commit 5/7] Hash: 123bd5cbe6d54105c96bb8a0b5c1b81f84b29e97 Date: 2026-01-09 20:37:38 +0000 Message: GP-6310 Apply extension patch if consumption is beyond small variable Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.hh [Commit 6/7] Hash: 451334568f3200f453b6b3985b5949f72747f1c6 Date: 2026-01-09 20:15:16 +0000 Message: Let RuleShiftAnd apply in more situations Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc [Commit 7/7] Hash: 92091a7a2ad59309514d808c7eb890492f5c49e8 Date: 2025-12-02 10:59:10 +0100 Message: decompiler: fix bit extractions with RuleShiftAnd and RuleShiftCompare Details: Fixes https://github.com/NationalSecurityAgency/ghidra/issues/8717 RuleShiftAnd previously replaced the AND opcode with COPY. This, however doesn't update the NZMask of the Varnode. As a result, following rules may assume the NZMask after the AND operation also applies to the Varnode being copied. In combination with RuleShiftCompare, an expression of the form (a & bitmask) >> const != 0, wrongfully is reduced to a != 0. Instead of replacing the AND with COPY, we now replace the input of the shift operation instead. This way, future rules will see the correct NZMask. Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc ``` |
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Eric Kilmer
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edc5fabd3a | Ghidra 12.0.1 (#386) v12.0.1 | ||
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auto-updater[bot]
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9316045354 |
Update Ghidra HEAD to commit 6ef256cef (#385)
Bump Ghidra HEAD commit 6ef256cef Changed files: ``` M Ghidra/Processors/AARCH64/data/languages/AARCH64.ldefs M Ghidra/Processors/AARCH64/data/languages/AARCH64.opinion M Ghidra/Processors/x86/data/languages/x86.opinion ``` Commit details: ``` [Commit 1/1] Hash: ad00d5734f82266e7d58624a36075da33d8e3005 Date: 2025-12-23 19:04:43 -0500 Message: GP-3960: ElfLoader can now recognize Swift and golang Files changed: M Ghidra/Processors/AARCH64/data/languages/AARCH64.ldefs M Ghidra/Processors/AARCH64/data/languages/AARCH64.opinion M Ghidra/Processors/x86/data/languages/x86.opinion ``` |
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auto-updater[bot]
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ec98f45ecf |
Update Ghidra HEAD to commit dc5836119 (#384)
Bump Ghidra HEAD commit dc5836119 Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh M Ghidra/Features/Decompiler/src/decompile/cpp/sleigh.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc ``` Commit details: ``` [Commit 1/4] Hash: 19836741896fd7664c9de9519a8841f9b593ae9f Date: 2025-12-17 19:52:07 +0000 Message: GP-6237 Move the unique crossbuild region to more significant bits Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/sleigh.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh [Commit 2/4] Hash: b8e698d97804de62a7dbf6664b0e3f264725c3d9 Date: 2025-09-12 20:10:43 +0000 Message: GP-3834 Allow 256 case switch, if a LOAD is present Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc [Commit 3/4] Hash: 6451d3d3135ba72a4c50f40667ad893b2c944de6 Date: 2025-12-12 00:17:12 +0000 Message: GP-6224 Don't resolve pointer if cast still required Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh [Commit 4/4] Hash: 9692dd064064ee712d8a724984f1b6b2bec4bc75 Date: 2025-12-10 19:26:03 +0000 Message: GP-6201 Check for free varnodes in functionalEqualityLevel0 Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc ``` |
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dependabot[bot]
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e4b6ddb926 |
build(deps): bump actions/upload-artifact from 5 to 6 (#383)
Bumps [actions/upload-artifact](https://github.com/actions/upload-artifact) from 5 to 6. - [Release notes](https://github.com/actions/upload-artifact/releases) - [Commits](https://github.com/actions/upload-artifact/compare/v5...v6) --- updated-dependencies: - dependency-name: actions/upload-artifact dependency-version: '6' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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9248e9114b |
Update Ghidra HEAD to commit 7bed72e38 (#382)
Bump Ghidra HEAD commit 7bed72e38 Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_block.cc M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc M Ghidra/Processors/68000/data/languages/68000.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc ``` Commit details: ``` [Commit 1/5] Hash: 0e658ae5b6a48fbd688ada2303ad7257f75370ea Date: 2025-11-18 17:19:57 +0000 Message: GP-6133 INT_ADD correction for RuleStructOffset0 applied to offset pointer Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc [Commit 2/5] Hash: 35ac4cf37cd1e10b14e0e758124dcc5a5741df1f Date: 2025-11-17 22:23:38 +0000 Message: GP-6130 Correct pointer offsets for buildStore and buildLoad Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc [Commit 3/5] Hash: f8d7b704df457fe5a10e6bb9766e7bb34db3e98e Date: 2025-11-04 20:44:18 +0000 Message: GP-6090 Adjustment for duplicate inputs in pushMultiequal Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_block.cc [Commit 4/5] Hash: 27b06c83a6c3ee05bebe2c60df2cc8b59a16b842 Date: 2025-02-03 17:36:04 +0000 Message: GP-5334: Corrected operand count for m68k addressing modes Files changed: M Ghidra/Processors/68000/data/languages/68000.sinc [Commit 5/5] Hash: b54347759775a2b9a8bb50afe4ed3a6c082a1bfb Date: 2025-11-13 18:59:44 +0000 Message: GP-6109: Fixed issue with PPC assembler not assembling some instructions Files changed: M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc ``` |
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dependabot[bot]
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a020faccb5 |
build(deps): bump actions/cache from 4 to 5 (#381)
Bumps [actions/cache](https://github.com/actions/cache) from 4 to 5. - [Release notes](https://github.com/actions/cache/releases) - [Changelog](https://github.com/actions/cache/blob/main/RELEASES.md) - [Commits](https://github.com/actions/cache/compare/v4...v5) --- updated-dependencies: - dependency-name: actions/cache dependency-version: '5' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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dependabot[bot]
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d74e8e9414 |
build(deps): bump peter-evans/create-pull-request from 7 to 8 (#380)
Bumps [peter-evans/create-pull-request](https://github.com/peter-evans/create-pull-request) from 7 to 8. - [Release notes](https://github.com/peter-evans/create-pull-request/releases) - [Commits](https://github.com/peter-evans/create-pull-request/compare/v7...v8) --- updated-dependencies: - dependency-name: peter-evans/create-pull-request dependency-version: '8' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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Eric Kilmer
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f8229f609d |
Ghidra 12.0 (#379)
- Copied patches directly from `HEAD` to use on `stable`v12.0 |
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auto-updater[bot]
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4edfcef82e |
Update Ghidra HEAD to commit d83ea1754 (#378)
Bump Ghidra HEAD commit d83ea1754 Changed files: ``` A Ghidra/Processors/NDS32/Module.manifest A Ghidra/Processors/NDS32/build.gradle A Ghidra/Processors/NDS32/certification.manifest A Ghidra/Processors/NDS32/data/languages/lsmw.sinc A Ghidra/Processors/NDS32/data/languages/nds32.cspec A Ghidra/Processors/NDS32/data/languages/nds32.dwarf A Ghidra/Processors/NDS32/data/languages/nds32.ldefs A Ghidra/Processors/NDS32/data/languages/nds32.opinion A Ghidra/Processors/NDS32/data/languages/nds32.pspec A Ghidra/Processors/NDS32/data/languages/nds32.sinc A Ghidra/Processors/NDS32/data/languages/nds32be.slaspec A Ghidra/Processors/NDS32/data/languages/nds32le.slaspec A Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml A Ghidra/Processors/NDS32/data/patterns/patternconstraints.xml M Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc ``` Commit details: ``` [Commit 1/9] Hash: d0f88bf9023ac412b50460fe9e0ac5fc76f14d90 Date: 2025-12-04 12:28:50 -0500 Message: GP-6007 Remove Decompiler dependency Files changed: M Ghidra/Processors/NDS32/build.gradle [Commit 2/9] Hash: 923ceb52d4727a2227a8b2512593ec4fb03ab0e2 Date: 2025-12-04 11:25:54 -0500 Message: GP-6007 use -l sleigh compile option with NDS32 Files changed: M Ghidra/Processors/NDS32/build.gradle [Commit 3/9] Hash: ddf4ad1182577f759b1c0e7c40d8825abd65b357 Date: 2025-12-03 22:06:38 +0000 Message: GP-6007 minor fixes for Andestar v5 Files changed: M Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc [Commit 4/9] Hash: 2efa886f5ca0996d3ea9f1865d952aa2708389b6 Date: 2025-12-03 21:36:18 +0000 Message: GP-6007 minor fixes for mfusr, mtusr and csreg space as global in cspec Files changed: M Ghidra/Processors/NDS32/data/languages/nds32.cspec M Ghidra/Processors/NDS32/data/languages/nds32.sinc [Commit 5/9] Hash: df6e4049d4f91f8cb9c9ff3888bb5f2a15a411d8 Date: 2025-12-02 20:21:14 +0000 Message: GP-6007: Added additional floating point config instructions Files changed: M Ghidra/Processors/NDS32/data/languages/nds32.sinc [Commit 6/9] Hash: 9bdd19cc087f889a16421b7cda082e2a08653449 Date: 2025-12-02 15:30:45 +0000 Message: GP-6007: Added CSR space and CSRs Files changed: M Ghidra/Processors/NDS32/data/languages/lsmw.sinc M Ghidra/Processors/NDS32/data/languages/nds32.pspec M Ghidra/Processors/NDS32/data/languages/nds32.sinc [Commit 7/9] Hash: ed4ae8bfa1f6b5db8c7356b2a4253c4c647e65f4 Date: 2025-11-26 20:19:40 +0000 Message: GP-6007: Added stubs for nds32 FPU instructions Files changed: M Ghidra/Processors/NDS32/build.gradle M Ghidra/Processors/NDS32/data/languages/nds32.ldefs M Ghidra/Processors/NDS32/data/languages/nds32.sinc M Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml [Commit 8/9] Hash: 71cd33572c873b1eebd322032506c259632d0d52 Date: 2025-09-22 14:37:16 +0000 Message: GP-6007: Updated NDS32 analyzer and elf relocation handler and test fixups Files changed: M Ghidra/Processors/NDS32/build.gradle A Ghidra/Processors/NDS32/certification.manifest D Ghidra/Processors/NDS32/data/buildLanguage.xml M Ghidra/Processors/NDS32/data/languages/lsmw.sinc M Ghidra/Processors/NDS32/data/languages/nds32.cspec M Ghidra/Processors/NDS32/data/languages/nds32.sinc M Ghidra/Processors/NDS32/data/languages/nds32be.slaspec M Ghidra/Processors/NDS32/data/languages/nds32le.slaspec D Ghidra/Processors/NDS32/data/sleighArgs.txt [Commit 9/9] Hash: fa7c3b1fec5e133f5147b6c541d023c646c0b170 Date: 2020-04-16 18:58:10 +0200 Message: [NDS32] Add support for the NDS32 Processor Files changed: A Ghidra/Processors/NDS32/Module.manifest A Ghidra/Processors/NDS32/build.gradle A Ghidra/Processors/NDS32/data/buildLanguage.xml A Ghidra/Processors/NDS32/data/languages/lsmw.sinc A Ghidra/Processors/NDS32/data/languages/nds32.cspec A Ghidra/Processors/NDS32/data/languages/nds32.dwarf A Ghidra/Processors/NDS32/data/languages/nds32.ldefs A Ghidra/Processors/NDS32/data/languages/nds32.opinion A Ghidra/Processors/NDS32/data/languages/nds32.pspec A Ghidra/Processors/NDS32/data/languages/nds32.sinc A Ghidra/Processors/NDS32/data/languages/nds32be.slaspec A Ghidra/Processors/NDS32/data/languages/nds32le.slaspec A Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml A Ghidra/Processors/NDS32/data/patterns/patternconstraints.xml A Ghidra/Processors/NDS32/data/sleighArgs.txt ``` |
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Eric Kilmer
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26c6b01b1f | Ghidra 11.4.3 (#377) v11.4.3 | ||
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dependabot[bot]
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563adb57e9 |
build(deps): bump softprops/action-gh-release from 2.4.2 to 2.5.0 (#376)
Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2.4.2 to 2.5.0. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](https://github.com/softprops/action-gh-release/compare/v2.4.2...v2.5.0) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: 2.5.0 dependency-type: direct:production update-type: version-update:semver-minor ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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127d913bc9 |
Update Ghidra HEAD to commit 14ead1aab (#375)
Bump Ghidra HEAD commit 14ead1aab Changed files: ``` M Ghidra/Processors/AARCH64/data/languages/AARCH64neon.sinc M Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc M Ghidra/Processors/ARM/data/languages/ARMneon.sinc M Ghidra/Processors/PowerPC/certification.manifest A Ghidra/Processors/PowerPC/data/patterns/PPC_BE_prepatterns.xml R060 Ghidra/Processors/PowerPC/data/ppc64-r2CallStubs.xml Ghidra/Processors/PowerPC/data/patterns/PPC_LE_prepatterns.xml A Ghidra/Processors/PowerPC/data/patterns/prepatternconstraints.xml ``` Commit details: ``` [Commit 1/4] Hash: 88ff4b2008051e2dced18b897d8b4bc280ba675d Date: 2025-11-24 18:25:40 +0000 Message: GP-6120_emteere_FixThunkDetectionMarkupPPC64 Files changed: M Ghidra/Processors/PowerPC/certification.manifest A Ghidra/Processors/PowerPC/data/patterns/PPC_BE_prepatterns.xml A Ghidra/Processors/PowerPC/data/patterns/PPC_LE_prepatterns.xml A Ghidra/Processors/PowerPC/data/patterns/prepatternconstraints.xml D Ghidra/Processors/PowerPC/data/ppc64-r2CallStubs.xml [Commit 2/4] Hash: 40c8aa60b1a4c2f0bb32e775e83557932ff40a05 Date: 2024-05-23 13:46:50 +0930 Message: AArch32: (Thumb32) fixed ldrsh.w & ldrsb.w (pc-relative) Details: * double memory load bug Files changed: M Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc [Commit 3/4] Hash: 0982753437eaa0a1015e56cd4d8fdd16a1310d63 Date: 2024-05-20 14:13:49 +0930 Message: AArch32: fixed vmvn Details: * fixed incorrect shift offset (bytes given in place of bits) and double word order Files changed: M Ghidra/Processors/ARM/data/languages/ARMneon.sinc [Commit 4/4] Hash: c4c7f11d1c310143adeabeb49dcb74313daf0746 Date: 2025-11-13 11:00:06 -0500 Message: fix AArch64 fmadd operand ordering for 32-bit case Files changed: M Ghidra/Processors/AARCH64/data/languages/AARCH64neon.sinc ``` |
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auto-updater[bot]
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0ea6de2744 |
Update Ghidra HEAD to commit 7a5a9ea5d (#374)
Bump Ghidra HEAD commit 7a5a9ea5d Changed files: ``` M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_instructions.sinc ``` Commit details: ``` [Commit 1/2] Hash: 22a5a22d824f68bff4db7d8c123661789f28ca61 Date: 2025-08-10 19:33:56 +0300 Message: PowerPC: fix condition check in bd*f* opcodes Files changed: M Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_instructions.sinc [Commit 2/2] Hash: 5857e63741c54a2db54450f5bc32e56fe94b62a5 Date: 2025-11-13 20:31:53 +0000 Message: GP-6118 Fix for specialized ARM cpy pc,lr Files changed: M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc ``` |
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dependabot[bot]
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27072f1bca |
build(deps): bump actions/checkout from 5 to 6 (#372)
Bumps [actions/checkout](https://github.com/actions/checkout) from 5 to 6. - [Release notes](https://github.com/actions/checkout/releases) - [Changelog](https://github.com/actions/checkout/blob/main/CHANGELOG.md) - [Commits](https://github.com/actions/checkout/compare/v5...v6) --- updated-dependencies: - dependency-name: actions/checkout dependency-version: '6' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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185e34f5e7 |
Update Ghidra HEAD to commit be482754a (#371)
Bump Ghidra HEAD commit be482754a Changed files: ``` M Ghidra/Processors/ARM/data/languages/ARM.ldefs M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc M Ghidra/Processors/ARM/data/patterns/ARM_BE_patterns.xml M Ghidra/Processors/ARM/data/patterns/ARM_LE_patterns.xml M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml M Ghidra/Processors/RISCV/certification.manifest A Ghidra/Processors/RISCV/data/languages/RV32.pspec D Ghidra/Processors/RISCV/data/languages/RV32G.pspec D Ghidra/Processors/RISCV/data/languages/RV32GC.pspec D Ghidra/Processors/RISCV/data/languages/RV32I.pspec D Ghidra/Processors/RISCV/data/languages/RV32IC.pspec D Ghidra/Processors/RISCV/data/languages/RV32IMC.pspec A Ghidra/Processors/RISCV/data/languages/RV64.pspec D Ghidra/Processors/RISCV/data/languages/RV64G.pspec D Ghidra/Processors/RISCV/data/languages/RV64GC.pspec D Ghidra/Processors/RISCV/data/languages/RV64I.pspec D Ghidra/Processors/RISCV/data/languages/RV64IC.pspec A Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc A Ghidra/Processors/RISCV/data/languages/andestar_v5.ldefs A Ghidra/Processors/RISCV/data/languages/andestar_v5.slaspec A Ghidra/Processors/RISCV/data/languages/old/riscv_deprecated.ldefs M Ghidra/Processors/RISCV/data/languages/riscv.csr.sinc M Ghidra/Processors/RISCV/data/languages/riscv.ilp32d.slaspec M Ghidra/Processors/RISCV/data/languages/riscv.instr.sinc M Ghidra/Processors/RISCV/data/languages/riscv.ldefs M Ghidra/Processors/RISCV/data/languages/riscv.lp64d.slaspec M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc M Ghidra/Processors/RISCV/data/languages/riscv.rvc.sinc M Ghidra/Processors/RISCV/data/languages/riscv.rvv.sinc M Ghidra/Processors/RISCV/data/languages/riscv.table.sinc M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec M Ghidra/Processors/RISCV/data/languages/riscv32.cspec M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec M Ghidra/Processors/RISCV/data/languages/riscv64.cspec M Ghidra/Processors/SuperH/data/languages/superh.sinc M Ghidra/Processors/Xtensa/data/languages/xtensaArch.sinc M Ghidra/Processors/Xtensa/data/languages/xtensaInstructions.sinc ``` Commit details: ``` [Commit 1/6] Hash: c3a2482e186185c86ba98b93044aa032fad48ce2 Date: 2025-11-05 14:39:41 -0500 Message: GP-5975 Eliminated unused NotFoundException from Memory methods. Revised import to always include pspec symbols within pcode-defined memory blocks. Added label name check. Revised language version upgrade to handle certain pspec-defined block and symbol changes. Corrected RISC-V 64-bit-fp cspec. Files changed: M Ghidra/Processors/RISCV/certification.manifest A Ghidra/Processors/RISCV/data/languages/old/riscv_deprecated.ldefs M Ghidra/Processors/RISCV/data/languages/riscv.ldefs M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec [Commit 2/6] Hash: ade1ad71ba5b80e910fcd98ad688f658439724a5 Date: 2025-09-30 17:08:48 +0000 Message: GP-5975 Refactored RISCV custom instruction, sinc file layout, simplified context, and moved csr register definitions to be in a special csreg ram space. Deprecated all most RISCV variants other than default. Added andestar V5 RISCV variant. Files changed: M Ghidra/Processors/RISCV/certification.manifest A Ghidra/Processors/RISCV/data/languages/RV32.pspec D Ghidra/Processors/RISCV/data/languages/RV32G.pspec D Ghidra/Processors/RISCV/data/languages/RV32GC.pspec D Ghidra/Processors/RISCV/data/languages/RV32I.pspec D Ghidra/Processors/RISCV/data/languages/RV32IC.pspec D Ghidra/Processors/RISCV/data/languages/RV32IMC.pspec A Ghidra/Processors/RISCV/data/languages/RV64.pspec D Ghidra/Processors/RISCV/data/languages/RV64G.pspec D Ghidra/Processors/RISCV/data/languages/RV64GC.pspec D Ghidra/Processors/RISCV/data/languages/RV64I.pspec D Ghidra/Processors/RISCV/data/languages/RV64IC.pspec A Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc A Ghidra/Processors/RISCV/data/languages/andestar_v5.ldefs A Ghidra/Processors/RISCV/data/languages/andestar_v5.slaspec M Ghidra/Processors/RISCV/data/languages/riscv.csr.sinc M Ghidra/Processors/RISCV/data/languages/riscv.ilp32d.slaspec M Ghidra/Processors/RISCV/data/languages/riscv.instr.sinc M Ghidra/Processors/RISCV/data/languages/riscv.ldefs M Ghidra/Processors/RISCV/data/languages/riscv.lp64d.slaspec M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc M Ghidra/Processors/RISCV/data/languages/riscv.rvc.sinc M Ghidra/Processors/RISCV/data/languages/riscv.rvv.sinc M Ghidra/Processors/RISCV/data/languages/riscv.table.sinc M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec M Ghidra/Processors/RISCV/data/languages/riscv32.cspec M Ghidra/Processors/RISCV/data/languages/riscv64.cspec [Commit 3/6] Hash: 0b60036f8fd0dd3cc70233fd3294d38755b7b525 Date: 2025-10-19 17:36:58 +0300 Message: SuperH fix 'bclr' opcode Files changed: M Ghidra/Processors/SuperH/data/languages/superh.sinc [Commit 4/6] Hash: 2419b08085dbfdf9a0ae8934526ebc7c30abce87 Date: 2025-11-06 18:47:35 +0000 Message: GP-6072 Fixed thunk detection and thunk address for Position Independent Code thunks that call to load a link register that is turned into a jump. Files changed: M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml [Commit 5/6] Hash: 3a0736f2647e5c095222473cebbdcad6a25c13a4 Date: 2025-10-03 15:47:44 -0500 Message: Xtensa: BE: Corrected decoding of the following instructions: BBCI, BBSI, BEQZ.N, BNEZ.N, DEPBITS, EXTUI, LDDEC, LDINC, MOVI.N, MUL.AD.*, MULA.AD.*, MUL.DA.*, MUL.DD.*, MULA.DA.*, MULA.DD.*, SLLI, SRAI, SSAI (Closes #8544, Closes #8537) Files changed: M Ghidra/Processors/Xtensa/data/languages/xtensaArch.sinc M Ghidra/Processors/Xtensa/data/languages/xtensaInstructions.sinc [Commit 6/6] Hash: 5924914b47881f5ab936b52ac7649493cb2268c9 Date: 2025-10-30 20:21:11 +0000 Message: GP-6079 ARM instruction CPY into PC with LR set before it is now a call. Also fixed a function start pattern, and spurious references placed on stack save of the PC. Files changed: M Ghidra/Processors/ARM/data/languages/ARM.ldefs M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc M Ghidra/Processors/ARM/data/patterns/ARM_BE_patterns.xml M Ghidra/Processors/ARM/data/patterns/ARM_LE_patterns.xml ``` |
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Klaus Kämpf
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1ea24c8b8d |
Catch Sleigh exceptions (#282)
Signed-off-by: Klaus Kämpf <kkaempf@gmail.com> |
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dependabot[bot]
|
572082b008 |
build(deps): bump softprops/action-gh-release from 2.4.1 to 2.4.2 (#370)
Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2.4.1 to 2.4.2. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](https://github.com/softprops/action-gh-release/compare/v2.4.1...v2.4.2) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: 2.4.2 dependency-type: direct:production update-type: version-update:semver-patch ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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a5496ad829 |
Update Ghidra HEAD to commit 4b1fd2254 (#369)
Bump Ghidra HEAD commit 4b1fd2254 Changed files: ``` M Ghidra/Processors/PA-RISC/data/languages/pa-risc.opinion M Ghidra/Processors/x86/certification.manifest A Ghidra/Processors/x86/data/extensions/rust/unix32/cc.xml R100 Ghidra/Processors/x86/data/extensions/rust/unix/probe_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix32/probe_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/unix32/try_fixup.xml R100 Ghidra/Processors/x86/data/extensions/rust/unix/cc.xml Ghidra/Processors/x86/data/extensions/rust/unix64/cc.xml R100 Ghidra/Processors/x86/data/extensions/rust/windows/probe_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix64/probe_fixup.xml R100 Ghidra/Processors/x86/data/extensions/rust/unix/try_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix64/try_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/windows32/probe_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/windows32/try_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/windows64/probe_fixup.xml R100 Ghidra/Processors/x86/data/extensions/rust/windows/try_fixup.xml Ghidra/Processors/x86/data/extensions/rust/windows64/try_fixup.xml ``` Commit details: ``` [Commit 1/2] Hash: bb63706226732c5f0c14cf01ae934a2cd6622fb6 Date: 2025-10-09 08:06:13 -0400 Message: GP-5942: Loader for "System Object Model" binaries Files changed: M Ghidra/Processors/PA-RISC/data/languages/pa-risc.opinion [Commit 2/2] Hash: 95ad48cdb371aeef15892767f4962ab1712db86f Date: 2025-10-28 17:22:13 +0000 Message: GP-4711 Fix for import of 32-bit x86 Unix/Windows Rust binaries Files changed: M Ghidra/Processors/x86/certification.manifest D Ghidra/Processors/x86/data/extensions/rust/unix/cc.xml D Ghidra/Processors/x86/data/extensions/rust/unix/probe_fixup.xml D Ghidra/Processors/x86/data/extensions/rust/unix/try_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/unix32/cc.xml A Ghidra/Processors/x86/data/extensions/rust/unix32/probe_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/unix32/try_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/unix64/cc.xml A Ghidra/Processors/x86/data/extensions/rust/unix64/probe_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/unix64/try_fixup.xml D Ghidra/Processors/x86/data/extensions/rust/windows/probe_fixup.xml D Ghidra/Processors/x86/data/extensions/rust/windows/try_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/windows32/probe_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/windows32/try_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/windows64/probe_fixup.xml A Ghidra/Processors/x86/data/extensions/rust/windows64/try_fixup.xml ``` Co-authored-by: pgoodman <43664+pgoodman@users.noreply.github.com> |
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estr3llas
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604cd282a6 |
Fixed URL to ghidra's SLEIGH page. (#368)
Update README.md |
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dependabot[bot]
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14c9c408ca |
build(deps): bump actions/upload-artifact from 4 to 5 (#367)
Bumps [actions/upload-artifact](https://github.com/actions/upload-artifact) from 4 to 5. - [Release notes](https://github.com/actions/upload-artifact/releases) - [Commits](https://github.com/actions/upload-artifact/compare/v4...v5) --- updated-dependencies: - dependency-name: actions/upload-artifact dependency-version: '5' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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dependabot[bot]
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21ed4b78e5 |
build(deps): bump softprops/action-gh-release from 2.4.0 to 2.4.1 (#366)
Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2.4.0 to 2.4.1. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](https://github.com/softprops/action-gh-release/compare/v2.4.0...v2.4.1) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: 2.4.1 dependency-type: direct:production update-type: version-update:semver-patch ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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dependabot[bot]
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d2c42d19ed |
build(deps): bump softprops/action-gh-release from 2.3.4 to 2.4.0 (#365)
Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2.3.4 to 2.4.0. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](https://github.com/softprops/action-gh-release/compare/v2.3.4...v2.4.0) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: 2.4.0 dependency-type: direct:production update-type: version-update:semver-minor ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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97f7fd1faf |
Update Ghidra HEAD to commit 53cca61f8 (#363)
Bump Ghidra HEAD commit 53cca61f8
Changed files:
```
M Ghidra/Processors/MIPS/data/languages/mips.sinc
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
```
Commit details:
```
[Commit 1/7]
Hash: 575dfa7572af0c726fa2d69c512ab486315559e6
Date: 2025-09-10 12:42:00 +0000
Message: GP-5902: Fixed gotos
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 2/7]
Hash: a6e9ea090022e9a97dd8411e51caad64dc80e63c
Date: 2025-08-30 15:46:00 +0100
Message: mips: Don't use reserved keywords for names
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 3/7]
Hash: a72a68c4612c368c8f9790e586a6246273714ed1
Date: 2025-08-30 14:47:57 +0100
Message: mips: Use & ~1 rather than & -2
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 4/7]
Hash: 3c095be95654fb333ea4c22ede44f096b8c341e2
Date: 2025-08-19 20:51:02 +0100
Message: Fix LI failing to match in some cases
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 5/7]
Hash: 63919665ec3d07639c6cbe30285640b775c8f099
Date: 2025-08-02 01:42:30 +0100
Message: mips: Correctly handle 64-bit regs in INS and EXT 16e2 instructions
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 6/7]
Hash: b31997bba0bcc7502d47060022f8173e42077365
Date: 2025-08-02 01:08:43 +0100
Message: mips: Add mips16e2 instructions
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips.sinc
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 7/7]
Hash: 4f3f1059dc67d10db6a82c2c29c93d0d11504401
Date: 2025-04-01 22:24:44 +0200
Message: Add eBPF instruction CALLX for indirect calls
Details:
When clang encounters indirect calls in eBPF programs, it emits a call
instruction with a register parameter (`BPF_X`) instead of an immediate
value (`BPF_K`). This encoding (`BPF_JMP | BPF_CALL | BPF_X = 0x8d`) is
decoded by llvm-objdump as `callx`.
For example, here is a simple C program with an indirect call:
extern void (*ptr_to_some_function)(void);
void call_ptr_to_some_function(void) {
ptr_to_some_function();
}
Compiling and disassembling it gives with clang 14.0 (and LLVM 14.0):
$ clang -O2 -target bpf -c indirect_call.c -o indirect_call.ebpf
$ llvm-objdump -rd indirect_call.ebpf
indirect_call.ebpf: file format elf64-bpf
Disassembly of section .text:
0000000000000000 <call_ptr_to_some_function>:
0: 18 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r1 = 0 ll
0000000000000000: R_BPF_64_64 ptr_to_some_function
2: 79 11 00 00 00 00 00 00 r1 = *(u64 *)(r1 + 0)
3: 8d 00 00 00 01 00 00 00 callx r1
4: 95 00 00 00 00 00 00 00 exit
Contrary to usual eBPF instructions, `callx`'s register operand is
encoded in the immediate field. This encoding is actually specific to
LLVM (and clang). GCC used the destination register to store the target
register.
LLVM 19.1 was modified to use GCC's encoding:
https://github.com/llvm/llvm-project/pull/81546 ("BPF: Change callx insn
encoding"). For example, in an Alpine Linux 3.21 system:
$ clang -target bpf --version
Alpine clang version 19.1.4
Target: bpf
Thread model: posix
InstalledDir: /usr/lib/llvm19/bin
$ clang -O2 -target bpf -c indirect_call.c -o indirect_call.ebpf
$ llvm-objdump -rd indirect_call.ebpf
indirect_call.ebpf: file format elf64-bpf
Disassembly of section .text:
0000000000000000 <call_ptr_to_some_function>:
0: 18 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r1 = 0x0 ll
0000000000000000: R_BPF_64_64 ptr_to_some_function
2: 79 11 00 00 00 00 00 00 r1 = *(u64 *)(r1 + 0x0)
3: 8d 01 00 00 00 00 00 00 callx r1
4: 95 00 00 00 00 00 00 00 exit
The instruction is now encoded `8d 01 00...`.
For reference, here are similar commands using GCC showing it is using
the same encoding (here, compiler option `-mxbpf` is required to enable
several features including indirect calls, cf.
https://gcc.gnu.org/onlinedocs/gcc-12.4.0/gcc/eBPF-Options.html ).
$ bpf-gcc --version
bpf-gcc (12-20220319-1ubuntu1+2) 12.0.1 20220319 (experimental) [master r12-7719-g8ca61ad148f]
$ bpf-gcc -O2 -c indirect_call.c -o indirect_call.ebpf -mxbpf
$ bpf-objdump -mxbpf -rd indirect_call.ebpf
indirect_call_gcc-12.ebpf: file format elf64-bpfle
Disassembly of section .text:
0000000000000000 <call_ptr_to_some_function>:
0: 18 00 00 00 00 00 00 00 lddw %r0,0
8: 00 00 00 00 00 00 00 00
0: R_BPF_INSN_64 ptr_to_some_function
10: 79 01 00 00 00 00 00 00 ldxdw %r1,[%r0+0]
18: 8d 01 00 00 00 00 00 00 call %r1
20: 95 00 00 00 00 00 00 00 exit
Add both `callx` instruction encodings to eBPF processor.
By the way, the eBPF Verifier used by Linux kernel currently forbids
indirect calls (it fails when `BPF_SRC(insn->code) != BPF_K`, in
https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/verifier.c?h=v6.14#n19141
). But other deployments of eBPF may already support this feature.
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
```
|
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dependabot[bot]
|
cf1dc2bb79 |
build(deps): bump softprops/action-gh-release from 2.3.3 to 2.3.4 (#364)
Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2.3.3 to 2.3.4. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](https://github.com/softprops/action-gh-release/compare/v2.3.3...v2.3.4) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: 2.3.4 dependency-type: direct:production update-type: version-update:semver-patch ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
|
a732884632 |
Update Ghidra HEAD to commit 96506554e (#362)
Bump Ghidra HEAD commit 96506554e Changed files: ``` M Ghidra/Processors/AARCH64/certification.manifest A Ghidra/Processors/AARCH64/data/languages/AARCH64_apple.cspec M Ghidra/Processors/AARCH64/data/languages/AppleSilicon.ldefs M Ghidra/Processors/x86/data/languages/x86-64-win.cspec M Ghidra/Processors/x86/data/languages/x86win.cspec M Ghidra/Processors/x86/data/patterns/x86-64gcc_patterns.xml M Ghidra/Processors/x86/data/patterns/x86-64win_patterns.xml M Ghidra/Processors/x86/data/patterns/x86gcc_patterns.xml M Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml M Ghidra/Processors/x86/data/patterns/x86win_patterns.xml ``` Commit details: ``` [Commit 1/4] Hash: dc069a18c602b71dbbb3bb7d150adb5b39565b8f Date: 2025-09-24 18:06:03 +0000 Message: GP-5287 Added ENDBR jump target checking instructions as function start patterns for x86 gcc binaries Files changed: M Ghidra/Processors/x86/data/patterns/x86-64gcc_patterns.xml M Ghidra/Processors/x86/data/patterns/x86gcc_patterns.xml [Commit 2/4] Hash: 69ed84a069255d06e500691dfd9229067bb8b209 Date: 2025-09-24 18:03:10 +0000 Message: GP-5526 bug fix for .plt.sec and pattern matching optimization Files changed: M Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml [Commit 3/4] Hash: 0815f463f543e0f09e582de612e04b612460bc4d Date: 2025-09-24 18:01:43 +0000 Message: GP-5998 Added security_check_cookie function patterns and callfixup for VS2022 based binaries. Files changed: M Ghidra/Processors/x86/data/languages/x86-64-win.cspec M Ghidra/Processors/x86/data/languages/x86win.cspec M Ghidra/Processors/x86/data/patterns/x86-64win_patterns.xml M Ghidra/Processors/x86/data/patterns/x86win_patterns.xml [Commit 4/4] Hash: 6e81a370ce02a1e9e65fe7d9d02240e8773ec8bb Date: 2025-09-11 17:36:37 +0000 Message: GP-3139 added cspec for AARCH64 apple silicon Files changed: M Ghidra/Processors/AARCH64/certification.manifest A Ghidra/Processors/AARCH64/data/languages/AARCH64_apple.cspec M Ghidra/Processors/AARCH64/data/languages/AppleSilicon.ldefs ``` |
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auto-updater[bot]
|
800a597ff6 |
Update Ghidra HEAD to commit 1ae4378cf (#361)
Bump Ghidra HEAD commit 1ae4378cf Changed files: ``` M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc M Ghidra/Processors/tricore/data/languages/tricore.ldefs M Ghidra/Processors/x86/certification.manifest M Ghidra/Processors/x86/data/patterns/prepatternconstraints.xml A Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml ``` Commit details: ``` [Commit 1/4] Hash: 24b2275c0b7bbdb30243d6b3877d0a5fb852243a Date: 2023-09-05 10:03:20 -0400 Message: tmp assigned rd0 instead of LR Files changed: M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc [Commit 2/4] Hash: be7458a4369e8b0ec0988f96d33a71b33912e750 Date: 2023-08-29 09:24:37 -0400 Message: Update avr32a_instruction_flow.sinc Details: The specification for avr32 says the LR register should be reserved for using return addresses, but in reality older compilers seem to use it to hold addresses for ICALL. When they do so without this fix the value in LR is immediately overwritten and during analysis only appears to be a function call to the opcode immediately after ICALL. Files changed: M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc [Commit 3/4] Hash: 4b6d90366c8569b5d780dd14a74445957db55582 Date: 2025-09-10 22:55:14 +0000 Message: GP-5526 Added section tag to function start patterns. New thunk patterns in x86 gcc .plt section. Changed priority of pre analyzer and disassembly. Files changed: M Ghidra/Processors/x86/certification.manifest M Ghidra/Processors/x86/data/patterns/prepatternconstraints.xml A Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml [Commit 4/4] Hash: 18a7f952c89be6951f4b3bf549a54daff5720cfd Date: 2024-11-08 15:39:42 +0100 Message: Processors: Rename TriCore Siemens to Infineon Files changed: M Ghidra/Processors/tricore/data/languages/tricore.ldefs ``` |
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auto-updater[bot]
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adcbfb179f |
Update Ghidra HEAD to commit 970c8fbdd (#360)
Bump Ghidra HEAD commit 970c8fbdd Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc M Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml ``` Commit details: ``` [Commit 1/1] Hash: ce09332fcdd011758d23a2505eced5949ffcc253 Date: 2025-09-02 18:17:49 +0000 Message: GP-4214 Allow INT_ADD in the iblock Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc M Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml ``` |
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dependabot[bot]
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64377586f8 |
build(deps): bump softprops/action-gh-release from 2.3.2 to 2.3.3 (#359)
Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2.3.2 to 2.3.3. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](https://github.com/softprops/action-gh-release/compare/v2.3.2...v2.3.3) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: 2.3.3 dependency-type: direct:production update-type: version-update:semver-patch ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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19fcb07d42 |
Update Ghidra HEAD to commit f501ffccd (#358)
Bump Ghidra HEAD commit f501ffccd Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh M Ghidra/Features/Decompiler/src/decompile/cpp/double.cc M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc M Ghidra/Features/Decompiler/src/decompile/cpp/op.hh M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.hh M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.hh A Ghidra/Features/Decompiler/src/decompile/datatests/condconst2.xml A Ghidra/Features/Decompiler/src/decompile/datatests/condconstsub.xml M Ghidra/Processors/x86/data/languages/x86gcc.cspec ``` Commit details: ``` [Commit 1/2] Hash: e412f13b30b54acdcfb85ae248f53edaac28598f Date: 2025-08-25 19:09:30 +0000 Message: GP-5950 Add support for multipath conditional constants Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh M Ghidra/Features/Decompiler/src/decompile/cpp/double.cc M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc M Ghidra/Features/Decompiler/src/decompile/cpp/op.hh M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.hh M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.hh A Ghidra/Features/Decompiler/src/decompile/datatests/condconst2.xml A Ghidra/Features/Decompiler/src/decompile/datatests/condconstsub.xml [Commit 2/2] Hash: 6229740f8b86198d5a32d881c852bc1d448be6ad Date: 2025-08-27 19:15:30 +0000 Message: GP-5958 added callfixup for get_pc_thunk.di to x86gcc.cspec Files changed: M Ghidra/Processors/x86/data/languages/x86gcc.cspec ``` |
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dependabot[bot]
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24e7a85db6 |
build(deps): bump actions/setup-python from 5 to 6 (#357)
Bumps [actions/setup-python](https://github.com/actions/setup-python) from 5 to 6. - [Release notes](https://github.com/actions/setup-python/releases) - [Commits](https://github.com/actions/setup-python/compare/v5...v6) --- updated-dependencies: - dependency-name: actions/setup-python dependency-version: '6' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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6b8620a8cf |
Update Ghidra HEAD to commit 7a4100d54 (#356)
* Add new source files * Bump Ghidra HEAD commit 7a4100d54 Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile M Ghidra/Features/Decompiler/src/decompile/cpp/cast.cc M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh A Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc A Ghidra/Features/Decompiler/src/decompile/cpp/expression.hh M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.hh M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc M Ghidra/Features/Decompiler/src/decompile/cpp/merge.hh M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc M Ghidra/Features/Decompiler/src/decompile/cpp/op.hh M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.hh M Ghidra/Features/Decompiler/src/decompile/cpp/variable.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.hh M Ghidra/Features/Decompiler/src/decompile/unittests/testparamstore.cc M Ghidra/Features/Decompiler/src/decompile/unittests/testtypes.cc M Ghidra/Processors/MIPS/certification.manifest M Ghidra/Processors/MIPS/data/languages/mips.ldefs R068 Ghidra/Processors/MIPS/data/languages/mips32be_eabi.cspec Ghidra/Processors/MIPS/data/languages/mips32_eabi.cspec M Ghidra/Processors/MIPS/data/languages/mips32be.cspec M Ghidra/Processors/MIPS/data/languages/mips32le.cspec D Ghidra/Processors/MIPS/data/languages/mips32le_eabi.cspec D Ghidra/Processors/MIPS/data/languages/mips64.cspec A Ghidra/Processors/MIPS/data/languages/mips64be.cspec A Ghidra/Processors/MIPS/data/languages/mips64le.cspec M Ghidra/Processors/PowerPC/certification.manifest M Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc M Ghidra/Processors/PowerPC/data/languages/SPE_EFV.sinc M Ghidra/Processors/PowerPC/data/languages/evx.sinc M Ghidra/Processors/PowerPC/data/languages/ppc.ldefs R070 Ghidra/Processors/PowerPC/data/languages/ppc_32_le.cspec Ghidra/Processors/PowerPC/data/languages/ppc_32.cspec D Ghidra/Processors/PowerPC/data/languages/ppc_32_be.cspec M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500_be.slaspec M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500_le.slaspec M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500mc_be.slaspec M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500mc_le.slaspec A Ghidra/Processors/PowerPC/data/languages/ppc_64_be.cspec R058 Ghidra/Processors/PowerPC/data/languages/ppc_64.cspec Ghidra/Processors/PowerPC/data/languages/ppc_64_le.cspec M Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_embedded.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml M Ghidra/Processors/x86/data/languages/ia.sinc ``` Commit details: ``` [Commit 1/6] Hash: f6495e4146e7ae5bebe1d4258793618f196eb6fa Date: 2025-07-15 23:09:23 +0000 Message: GP-5851 Fix tiling truncations for odd data-type sizes in MultiSlotAssign. Fix for big endian multi-slot return value. Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/cast.cc M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.hh M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh M Ghidra/Features/Decompiler/src/decompile/unittests/testparamstore.cc M Ghidra/Features/Decompiler/src/decompile/unittests/testtypes.cc [Commit 2/6] Hash: f391ddb87c88e553b84cc34a696509a01b08e7f5 Date: 2025-08-26 11:59:06 -0400 Message: GP-5945 Fixed PowerPC e500 instruction extension issues and added function start pattern variants. Files changed: M Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc M Ghidra/Processors/PowerPC/data/languages/SPE_EFV.sinc M Ghidra/Processors/PowerPC/data/languages/evx.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500_be.slaspec M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500_le.slaspec M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500mc_be.slaspec M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500mc_le.slaspec M Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_embedded.sinc M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml [Commit 3/6] Hash: 393e7935af660c07e2139f99468f0f32125fae99 Date: 2025-08-26 08:33:50 -0400 Message: GP-5906: Added x86 SSE4a instructions Files changed: M Ghidra/Processors/x86/data/languages/ia.sinc [Commit 4/6] Hash: d9a5ad2ed0bd888fa950ccf1bf16cf9b6f8211e4 Date: 2025-08-25 19:31:22 +0000 Message: GP-4029 updated mips and ppc language versions Files changed: M Ghidra/Processors/MIPS/data/languages/mips.ldefs M Ghidra/Processors/PowerPC/data/languages/ppc.ldefs [Commit 5/6] Hash: d91aebe74e801d49bf9d37805256e60db465a8d3 Date: 2025-02-25 20:50:19 +0000 Message: GP-4030: Fix MIPS base and eabi 32/64-bit cspecs GP-4029: Update base PowerPC 32/64-bit cspecs Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.hh M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh M Ghidra/Processors/MIPS/certification.manifest M Ghidra/Processors/MIPS/data/languages/mips.ldefs A Ghidra/Processors/MIPS/data/languages/mips32_eabi.cspec M Ghidra/Processors/MIPS/data/languages/mips32be.cspec D Ghidra/Processors/MIPS/data/languages/mips32be_eabi.cspec M Ghidra/Processors/MIPS/data/languages/mips32le.cspec D Ghidra/Processors/MIPS/data/languages/mips32le_eabi.cspec D Ghidra/Processors/MIPS/data/languages/mips64.cspec A Ghidra/Processors/MIPS/data/languages/mips64be.cspec A Ghidra/Processors/MIPS/data/languages/mips64le.cspec M Ghidra/Processors/PowerPC/certification.manifest M Ghidra/Processors/PowerPC/data/languages/ppc.ldefs A Ghidra/Processors/PowerPC/data/languages/ppc_32.cspec D Ghidra/Processors/PowerPC/data/languages/ppc_32_be.cspec D Ghidra/Processors/PowerPC/data/languages/ppc_32_le.cspec D Ghidra/Processors/PowerPC/data/languages/ppc_64.cspec A Ghidra/Processors/PowerPC/data/languages/ppc_64_be.cspec A Ghidra/Processors/PowerPC/data/languages/ppc_64_le.cspec [Commit 6/6] Hash: 8217593e87635153066b8ea7a11d19e1ea02a555 Date: 2025-08-18 23:21:42 +0000 Message: GP-5934 Fix handling of integer minimum in SBORROW, SLESS rules, add SCARRY rule. Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh A Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc A Ghidra/Features/Decompiler/src/decompile/cpp/expression.hh M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh M Ghidra/Features/Decompiler/src/decompile/cpp/merge.hh M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc M Ghidra/Features/Decompiler/src/decompile/cpp/op.hh M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.hh M Ghidra/Features/Decompiler/src/decompile/cpp/variable.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.hh ``` --------- Co-authored-by: Eric Kilmer <eric.d.kilmer@gmail.com> |
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Eric Kilmer
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f398228901 |
Ghidra 11.4.2 (#355)
* Update spec files listv11.4.2 |
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auto-updater[bot]
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d0d9bf5a67 |
Update Ghidra HEAD to commit 4fcc1febd (#354)
Bump Ghidra HEAD commit 4fcc1febd Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh M Ghidra/Features/Decompiler/src/decompile/cpp/pcodecompile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/semantics.cc M Ghidra/Features/Decompiler/src/decompile/cpp/semantics.hh M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh A Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml M Ghidra/Processors/8051/data/languages/80251.sinc M Ghidra/Processors/8051/data/languages/8051_main.sinc M Ghidra/Processors/AARCH64/data/languages/AARCH64_swift.cspec M Ghidra/Processors/MCS96/data/languages/MCS96.sinc M Ghidra/Processors/PIC/data/languages/PIC24.sinc M Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc M Ghidra/Processors/PowerPC/data/languages/altivec.sinc M Ghidra/Processors/SuperH/data/languages/superh.cspec M Ghidra/Processors/SuperH/data/languages/superh2a.cspec M Ghidra/Processors/x86/data/languages/x86-64-swift.cspec ``` Commit details: ``` [Commit 1/7] Hash: 3abf7f765e6d045d152589a7f73c8b4fea6c35a5 Date: 2025-08-21 06:42:41 -0400 Message: GP-0: Updating Swift documentation links Files changed: M Ghidra/Processors/AARCH64/data/languages/AARCH64_swift.cspec M Ghidra/Processors/x86/data/languages/x86-64-swift.cspec [Commit 2/7] Hash: 42115f6df02329a745a3878aafa96439088deaf0 Date: 2025-08-18 17:12:23 +0000 Message: GP-5581: Allow optimization by truncation of subpieced unique varnodes. Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/pcodecompile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/semantics.cc M Ghidra/Features/Decompiler/src/decompile/cpp/semantics.hh M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh M Ghidra/Processors/MCS96/data/languages/MCS96.sinc M Ghidra/Processors/PIC/data/languages/PIC24.sinc M Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc M Ghidra/Processors/PowerPC/data/languages/altivec.sinc [Commit 3/7] Hash: bb19782c35fd087d636f1dd5e41f9c5c02ac94ce Date: 2025-08-11 20:27:21 +0000 Message: GP-5927 Add support for SUBPIECE removal in ConditionalExecution Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh A Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml [Commit 4/7] Hash: 9c9938e0662fa3b5cb48a79a10bf5e53edddb19b Date: 2025-07-30 19:32:34 +0000 Message: GP-5889 Check for common source in duplicated switch guard detection Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh [Commit 5/7] Hash: 28313c6574c61da69299fda185b884e2c785d7c1 Date: 2025-08-07 12:44:05 +0000 Message: GP-5912 Adding SH2 GBR register to the preserved by call list Files changed: M Ghidra/Processors/SuperH/data/languages/superh.cspec M Ghidra/Processors/SuperH/data/languages/superh2a.cspec [Commit 6/7] Hash: e7cad294c9b0a19ec9d74ef733e31451fb47c468 Date: 2025-07-29 14:59:32 +0100 Message: Fix 80251 "ANL Rm,#data" showing as "ADD" Details: Should be self explanatory, looks like it was just a typo. Files changed: M Ghidra/Processors/8051/data/languages/80251.sinc [Commit 7/7] Hash: cca3fcc208f9f1f8f69f60ed58dd470f976bddf0 Date: 2025-07-29 14:57:07 +0100 Message: Fix ANL Areg,Data for 80251 in source mode Details: ANL Areg,Data should be GROUP1 rather than GROUP2, the incorrect group causes the instruction to fail to decode on source mode 80251 Files changed: M Ghidra/Processors/8051/data/languages/8051_main.sinc ``` |
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auto-updater[bot]
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632fa35e36 |
Update Ghidra HEAD to commit 98b938cc6 (#353)
Bump Ghidra HEAD commit 98b938cc6 Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/block.cc M Ghidra/Features/Decompiler/src/decompile/cpp/block.hh M Ghidra/Features/Decompiler/src/decompile/cpp/blockaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc M Ghidra/Processors/x86/data/languages/x86-64.dwarf M Ghidra/Processors/x86/data/languages/x86.dwarf ``` Commit details: ``` [Commit 1/2] Hash: e908ab6fbf4311f99fa86d50b60aa4802a6e3fd6 Date: 2025-08-11 11:21:28 -0400 Message: DWARF expression handling refactor Details: Cleanup logic of expression evaluation, stub out resolution of register values to a callback in case we want to use constant propagation to try to allow successful calculations, and add support for default static values for treating an arch's stack frame register (e.g. RBP) like the static CFA value we already have support for. Add option to decorate params and local vars with their DWARF storage location info. Handle arrays with unspecified element type. Files changed: M Ghidra/Processors/x86/data/languages/x86-64.dwarf M Ghidra/Processors/x86/data/languages/x86.dwarf [Commit 2/2] Hash: 29b7cb655283c124b4d999e8b3d45c58e7004b69 Date: 2025-08-07 15:19:32 +0000 Message: GP-5915 Fix bug in ConditionalJoin Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/block.cc M Ghidra/Features/Decompiler/src/decompile/cpp/block.hh M Ghidra/Features/Decompiler/src/decompile/cpp/blockaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc ``` |
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auto-updater[bot]
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e925db971d |
Update Ghidra HEAD to commit 42794bc3f (#351)
* Fix some patches and rename test binary * Bump Ghidra HEAD commit 42794bc3f Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/.gitignore M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile M Ghidra/Features/Decompiler/src/decompile/cpp/address.cc M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc M Ghidra/Features/Decompiler/src/decompile/cpp/heritage.cc M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slghsymbol.cc M Ghidra/Features/Decompiler/src/decompile/cpp/stringmanage.cc M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc M Ghidra/Features/Decompiler/src/decompile/cpp/transform.cc M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc ``` Commit details: ``` [Commit 1/1] Hash: 943ccd322ddc280cd28cb7cb6ef8328941c3d574 Date: 2025-07-23 22:49:35 +0000 Message: GP-5869 Fix for some out of bounds array indices and shift amounts Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/.gitignore M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile M Ghidra/Features/Decompiler/src/decompile/cpp/address.cc M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc M Ghidra/Features/Decompiler/src/decompile/cpp/heritage.cc M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/slghsymbol.cc M Ghidra/Features/Decompiler/src/decompile/cpp/stringmanage.cc M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc M Ghidra/Features/Decompiler/src/decompile/cpp/transform.cc M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc ``` --------- Co-authored-by: Eric Kilmer <eric.d.kilmer@gmail.com> |
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dependabot[bot]
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e590133fc7 |
build(deps): bump actions/checkout from 4 to 5 (#352)
Bumps [actions/checkout](https://github.com/actions/checkout) from 4 to 5. - [Release notes](https://github.com/actions/checkout/releases) - [Changelog](https://github.com/actions/checkout/blob/main/CHANGELOG.md) - [Commits](https://github.com/actions/checkout/compare/v4...v5) --- updated-dependencies: - dependency-name: actions/checkout dependency-version: '5' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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760a315270 |
Update Ghidra HEAD to commit 0a97fd8fe (#350)
Bump Ghidra HEAD commit 0a97fd8fe Changed files: ``` M Ghidra/Processors/ARM/data/languages/ARMneon.sinc M Ghidra/Processors/HCS08/data/languages/HCS_HC.sinc M Ghidra/Processors/MC6800/data/languages/6805.slaspec M Ghidra/Processors/SuperH4/data/languages/SuperH4.sinc M Ghidra/Processors/SuperH4/data/languages/SuperH4_le.cspec M Ghidra/Processors/Toy/certification.manifest M Ghidra/Processors/Toy/data/languages/toy.ldefs M Ghidra/Processors/Toy/data/languages/toy.sinc A Ghidra/Processors/Toy/data/languages/toy64_be_harvard_rev.slaspec M Ghidra/Processors/eBPF/certification.manifest M Ghidra/Processors/eBPF/data/languages/eBPF.ldefs M Ghidra/Processors/eBPF/data/languages/eBPF.opinion M Ghidra/Processors/eBPF/data/languages/eBPF.sinc A Ghidra/Processors/eBPF/data/languages/eBPF_be.slaspec M Ghidra/Processors/eBPF/data/languages/eBPF_le.slaspec M Ghidra/Processors/x86/data/languages/avx512.sinc M Ghidra/Processors/x86/data/languages/ia.sinc ``` Commit details: ``` [Commit 1/15] Hash: 352fed0d953aacf3ee6304516b4679c134c9a0f5 Date: 2025-07-29 14:32:54 +0000 Message: GP-5853: Initial implementation of ARM Neon VLD/VSTn instructions. Files changed: M Ghidra/Processors/ARM/data/languages/ARMneon.sinc [Commit 2/15] Hash: 4abf6d55ad54a91afb9adf5e9e122302e4ca10f8 Date: 2025-07-29 07:12:56 -0400 Message: GP-5766: Fixed instruction AVX512 disassembly errors Files changed: M Ghidra/Processors/x86/data/languages/avx512.sinc M Ghidra/Processors/x86/data/languages/ia.sinc [Commit 3/15] Hash: 24d19f6e8c31c038345fb33d3a957fe990222ea2 Date: 2025-04-04 17:54:31 +0200 Message: Add eBPF ISA v4 instructions Details: In 2023, the eBPF instruction set was modified to add several instructions related to signed operations (load with sign-extension, signed division, etc.), a 32-bit jump instruction and some byte-swap instructions. This became version 4 of eBPF ISA. Here are some references about this change: - https://pchaigno.github.io/bpf/2021/10/20/ebpf-instruction-sets.html (a blog post about eBPF instruction set extensions) - https://lore.kernel.org/bpf/4bfe98be-5333-1c7e-2f6d-42486c8ec039@meta.com/ (documentation sent to Linux Kernel mailing list) - https://www.rfc-editor.org/rfc/rfc9669.html#name-sign-extension-load-operati (IETF's BPF Instruction Set Architecture standard defined the new instructions) - https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/core.c?h=v6.14#n1859 (implementation of signed division and remainder in Linux kernel. This shows that 32-bit signed DIV and signed MOD are zero-extending the result in DST) - https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/core.c?h=v6.14#n2135 (implementation of signed memory load in Linux kernel) - https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1f9a1ea821ff25353a0e80d971e7958cd55b47a3 (commit which added signed memory load instructions in Linux kernel) This can be tested with a recent enough version of clang and LLVM (this works with clang 19.1.4 on Alpine 3.21). For example for signed memory load instructions: signed int sext_8bit(signed char x) { return x; } produces: $ clang -O0 -target bpf -mcpu=v4 -c test.c -o test.ebpf $ llvm-objdump -rd test.ebpf ... 0000000000000000 <sext_8bit>: 0: 73 1a ff ff 00 00 00 00 *(u8 *)(r10 - 0x1) = r1 1: 91 a1 ff ff 00 00 00 00 r1 = *(s8 *)(r10 - 0x1) 2: bc 10 00 00 00 00 00 00 w0 = w1 3: 95 00 00 00 00 00 00 00 exit (The second instruction is a signed memory load) Instruction MOVS (Sign extend register MOV) uses offset to encode the conversion (whether the source register is to be considered as signed 8-bit, 16-bit or 32-bit integer). The mnemonic for these instructions is quite unclear: - They are all named MOVS in the proposal https://lore.kernel.org/bpf/4bfe98be-5333-1c7e-2f6d-42486c8ec039@meta.com/ - LLVM and Linux disassemblers only display pseudo-code (`r0 = (s8)r1`) - RFC 9669 (https://datatracker.ietf.org/doc/rfc9669/) uses MOVSX for all instructions. - GCC uses MOVS for all instructions: https://github.com/gcc-mirror/gcc/blob/releases/gcc-14.1.0/gcc/config/bpf/bpf.md?plain=1#L326-L365 To make the disassembled code clearer, decode such instructions with a size suffix: MOVSB, MOVSH, MOVSW. The decoding of instructions 32-bit JA, BSWAP16, BSWAP32 and BSWAP64 is straightforward. Files changed: M Ghidra/Processors/eBPF/data/languages/eBPF.sinc [Commit 4/15] Hash: 39c0a83c0c4540b0776ef2e8fd8c2c7fb966d55c Date: 2025-07-28 15:48:40 +0000 Message: GP-5877: Fix Patch Instruction action in some Harvard architectures. Files changed: M Ghidra/Processors/Toy/certification.manifest M Ghidra/Processors/Toy/data/languages/toy.ldefs M Ghidra/Processors/Toy/data/languages/toy.sinc A Ghidra/Processors/Toy/data/languages/toy64_be_harvard_rev.slaspec [Commit 5/15] Hash: e2de11d5b284d17828b5513678d2de2a1c775cfe Date: 2025-04-03 16:48:48 +0200 Message: Fix eBPF zero-extend load instructions Details: When a loading less than 8 bytes to a register, the value is supposed to be zero-extended. This is what the eBPF execution engine in the Linux kernel does, in https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/core.c?h=v6.14#n2113 This is also what is specified in RFC 9669 which standardised BPF ISA: https://www.rfc-editor.org/rfc/rfc9669.html#name-regular-load-and-store-oper Add the missing `zext` calls in the semantic section of instructions LDXW, LDXH and LDXB. While at it, add them to other load instructions. For information, the issue can be seen when analyzing this C program: unsigned int div_by_1000(unsigned int value) { return value / 1000; } Compiling it with clang gives: $ clang -O0 -target bpf -c division.c -o division.ebpf $ bpf-objdump -rd division.ebpf division.ebpf: file format elf64-bpfle Disassembly of section .text: 0000000000000000 <div_by_1000>: 0: 63 1a fc ff 00 00 00 00 stxw [%fp+-4],%r1 8: 61 a0 fc ff 00 00 00 00 ldxw %r0,[%fp+-4] 10: 37 00 00 00 e8 03 00 00 div %r0,0x3e8 18: 95 00 00 00 00 00 00 00 exit Ghidra decompiles this program as: ulonglong div_by_1000(uint param_1) { undefined4 in_stack_00000000; return CONCAT44(in_stack_00000000,param_1) / 1000; } This `in_stack_00000000` comes from the way the parameter is loaded from the stack. The listing shows the following disassembly and p-code operations: ram:00100008 61 a0 fc ff 00 LDXW R0,[R10 + -0x4=>Stack[-0x4]] 00 00 00 $U3e00:8 = INT_ADD R10, -4:8 R0 = LOAD ram($U3e00:8) This shows the value is indeed loaded from 8 bytes at `$U3e00:8` instead of 4. After adding `zext` calls, Ghidra decodes the same instruction as: ram:00100008 61 a0 fc ff 00 LDXW R0,[R10 + -0x4=>local_4] 00 00 00 $U4100:8 = INT_ADD R10, -4:8 $U4180:4 = LOAD ram($U4100:8) R0 = INT_ZEXT $U4180:4 This only loads 4 bytes from the stack, as expected. Moreover the decompilation view is now correct: ulonglong div_by_1000(uint param_1) { return (ulonglong)param_1 / 1000; } Files changed: M Ghidra/Processors/eBPF/data/languages/eBPF.sinc [Commit 6/15] Hash: c1d96a214049944549c6429f994907f19de72acb Date: 2025-03-18 22:24:23 +0100 Message: Fix eBPF CALL operand decoding Details: The operand of the CALL instruction missed multiplying the immediate value by 8. Without this, calls are not decoded correctly. Such a CALL instruction can be emitted when compiling this simple `single_call.c` program: static int one(void) { return 1; } int call_one(void) { return one(); } with: clang -O0 -target bpf -c single_call.c -o single_call.ebpf Disassembling with LLVM shows: $ llvm-objdump -d single_call.ebpf single_call.ebpf: file format elf64-bpf Disassembly of section .text: 0000000000000000 <call_one>: 0: 85 10 00 00 01 00 00 00 call 1 1: 95 00 00 00 00 00 00 00 exit 0000000000000010 <one>: 2: b7 00 00 00 01 00 00 00 r0 = 1 3: 95 00 00 00 00 00 00 00 exit The first instruction ("call 1") calls the function located at 0x10 (at index `2:` in the listing). Ghidra considered the call to target address 9 instead (as `inst_next = 8` and `imm = 1`). Fix this by multiplying `imm` by 8 when encountering a `disp32` operand (which is only used by instruction `CALL`). Adjust ELF Relocation R_BPF_64_32 to take into account for this multiplication by 8. Actually it is documented to compute (S + A) / 8 - 1 so the division by 8 was missing. Files changed: M Ghidra/Processors/eBPF/data/languages/eBPF.sinc [Commit 7/15] Hash: adb0eac98aacb8b26d0f935e3f10974482d626a8 Date: 2025-05-07 15:40:24 +0200 Message: Add support for big endian eBPF programs Files changed: M Ghidra/Processors/eBPF/certification.manifest M Ghidra/Processors/eBPF/data/languages/eBPF.ldefs M Ghidra/Processors/eBPF/data/languages/eBPF.opinion M Ghidra/Processors/eBPF/data/languages/eBPF.sinc A Ghidra/Processors/eBPF/data/languages/eBPF_be.slaspec [Commit 8/15] Hash: 52cb7a36e685af547f0e2cc9782dc46755764c51 Date: 2025-04-04 22:00:34 +0200 Message: Fix the semantics of eBPF byte swap instructions Details: eBPF byte swap operations (BE16, BE32, BE64, LE16, LE32, LE64) have semantics that depend on the endianness of the host processor executing the eBPF program. For example, on a Little-Endian CPU, BE16 swaps the 2 lowest significant bytes of the given destination register. The semantic section of LE16 contains: { dst=((dst) >> 8) | ((dst) << 8); } This contains several issues: - It assumes the instruction always swaps the bytes. This should only happen on Big-Endian host CPU. - If `dst` does not contain a 16-bit value (meaning `dst >> 16 != 0`), the computed value is wrong. The value should be properly masked. For example the Linux kernel defines in https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/uapi/linux/swab.h?h=v6.14#L14 #define ___constant_swab16(x) ((__u16)( \ (((__u16)(x) & (__u16)0x00ffU) << 8) | \ (((__u16)(x) & (__u16)0xff00U) >> 8))) As the endianness of the CPU has to be the same as the eBPF program (defined in the ELF header), introduce a macro `ENDIAN` and use it to implement the byte swap operations. Files changed: M Ghidra/Processors/eBPF/data/languages/eBPF.sinc M Ghidra/Processors/eBPF/data/languages/eBPF_le.slaspec [Commit 9/15] Hash: 997c64f6db8bc50c4f02f15a29d88f02a2dfeadc Date: 2025-06-16 14:29:10 +0000 Message: GP-5759: Fixed token piece formatting Files changed: M Ghidra/Processors/SuperH4/data/languages/SuperH4.sinc [Commit 10/15] Hash: 24c0699a38246fea7e32900d54d2cfa3ae42358a Date: 2025-05-23 15:08:01 +0300 Message: SuperH4: fix FSCA opcode destination location Files changed: M Ghidra/Processors/SuperH4/data/languages/SuperH4.sinc [Commit 11/15] Hash: 53d7e1608f5aeb680c53a08cf2a28ff932df5f19 Date: 2025-05-23 15:03:55 +0300 Message: SuperH4: fix fpu registers order Files changed: M Ghidra/Processors/SuperH4/data/languages/SuperH4_le.cspec [Commit 12/15] Hash: c86d9069c577f7a88f7ab59da1113fdd14ad7ff0 Date: 2024-10-29 19:31:21 +0000 Message: Update 6805.slaspec Files changed: M Ghidra/Processors/MC6800/data/languages/6805.slaspec [Commit 13/15] Hash: e04e47a7454df0c0e489e81311c8592ac418f279 Date: 2024-10-29 19:25:20 +0000 Message: Update HCS_HC.sinc Details: Incorporate fixes from PR Files changed: M Ghidra/Processors/HCS08/data/languages/HCS_HC.sinc [Commit 14/15] Hash: 67bfea173fc03dae728c07cc468e51e360b14367 Date: 2024-10-17 01:24:10 +0100 Message: Update HCS_HC.sinc Details: Fixes https://github.com/NationalSecurityAgency/ghidra/issues/7064 for 68HC05 Files changed: M Ghidra/Processors/HCS08/data/languages/HCS_HC.sinc [Commit 15/15] Hash: 270e6867dbd0c6767acadae4ceecfd1728afe88a Date: 2024-10-17 00:10:26 +0100 Message: Update 6805.slaspec Details: Fix for https://github.com/NationalSecurityAgency/ghidra/issues/7064 (incorrect handling of X-indexed JMP and JSR) Files changed: M Ghidra/Processors/MC6800/data/languages/6805.slaspec ``` |
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Eric Kilmer
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bf13fdebba | Ghidra 11.4.1 (#349) v11.4.1 | ||
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auto-updater[bot]
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a49bbcc9cf |
Update Ghidra HEAD to commit 7e6c01f28 (#348)
Bump Ghidra HEAD commit 7e6c01f28 Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/flow.cc M Ghidra/Features/Decompiler/src/decompile/cpp/flow.hh M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.hh M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_op.cc M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.hh A Ghidra/Features/Decompiler/src/decompile/datatests/inlinetarget.xml M Ghidra/Processors/MIPS/data/patterns/MIPS_BE_patterns.xml M Ghidra/Processors/MIPS/data/patterns/MIPS_LE_patterns.xml ``` Commit details: ``` [Commit 1/5] Hash: fc4b7800251f59395e1ddc9bb85e932c69e00a65 Date: 2025-06-04 19:56:49 +0000 Message: GP-5736 prevent constant propagation from making RETURN inputs constant (Closes #8183) Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc [Commit 2/5] Hash: cc0203307d6b0347cae04f4794798633e36567af Date: 2025-07-23 17:31:18 +0000 Message: GP-5863 Check for input intersection before creating unreferenced param Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.hh M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.hh [Commit 3/5] Hash: c4c7aa5dad6eb651e76d86d0d1a7a5c2ad6ded61 Date: 2025-07-21 19:40:05 +0000 Message: Fix for infinite loop caused by RulePtrsubUndo Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc [Commit 4/5] Hash: 3468c4b5025ff936080e56163b4fc155a538ed83 Date: 2025-07-17 22:42:00 +0000 Message: GP-5843 Added MIPS64 function start patterns Files changed: M Ghidra/Processors/MIPS/data/patterns/MIPS_BE_patterns.xml M Ghidra/Processors/MIPS/data/patterns/MIPS_LE_patterns.xml [Commit 5/5] Hash: 80d66023a974d775e97f770b826d800c1de42461 Date: 2025-07-16 18:29:53 +0000 Message: GP-5832 Update inline target op when inlining a subfunction Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/flow.cc M Ghidra/Features/Decompiler/src/decompile/cpp/flow.hh M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_op.cc A Ghidra/Features/Decompiler/src/decompile/datatests/inlinetarget.xml ``` Co-authored-by: pgoodman <43664+pgoodman@users.noreply.github.com> |
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auto-updater[bot]
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1f41ff02e6 |
Update Ghidra HEAD to commit 12a8db619 (#347)
Bump Ghidra HEAD commit 12a8db619 Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc M Ghidra/Processors/ARM/data/languages/ARM.cspec M Ghidra/Processors/ARM/data/languages/ARM_win.cspec M Ghidra/Processors/Atmel/data/languages/avr8gcc.cspec M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec M Ghidra/Processors/RISCV/data/languages/riscv32.cspec M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec M Ghidra/Processors/RISCV/data/languages/riscv64.cspec ``` Commit details: ``` [Commit 1/5] Hash: 991a4b440c6fe2073ede634359afff2da8e174c8 Date: 2025-07-16 20:22:28 +0000 Message: GP-4356: fixes to avr8 cspec and elf extension, and additions to decompiler model rules Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh M Ghidra/Processors/Atmel/data/languages/avr8gcc.cspec [Commit 2/5] Hash: f26d36c6bb961271fe7fd77a734bd4010c6a210c Date: 2025-07-16 16:38:27 +0000 Message: GP-5211: Fix RISCV 32- and 64-bit compiler specifications and relocation handler Files changed: M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec M Ghidra/Processors/RISCV/data/languages/riscv32.cspec M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec M Ghidra/Processors/RISCV/data/languages/riscv64.cspec [Commit 3/5] Hash: 3e117157787f79f842f72d82641426ab9d4b9a28 Date: 2025-07-14 18:38:17 +0000 Message: GP-4989: Fix ARM AAPCS cspec, add soft float calling convention Files changed: M Ghidra/Processors/ARM/data/languages/ARM.cspec M Ghidra/Processors/ARM/data/languages/ARM_win.cspec [Commit 4/5] Hash: 3067d3e61f98d195060be8c2ee65922d16bd29f6 Date: 2025-07-14 17:21:02 +0000 Message: GP-5367: Filter by max_primitives on homogeneous aggregate types in cspec Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh [Commit 5/5] Hash: b3f4609330128138f3246359bdb834ac7604e81d Date: 2025-05-23 19:10:25 +0000 Message: GP-5718 fix for index issue Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc ``` |
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auto-updater[bot]
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060f42d28c |
Update Ghidra HEAD to commit e63d97b11 (#346)
* ci: Enforce passing tests on HEAD * Bump Ghidra HEAD commit e63d97b11 Changed files: ``` M Ghidra/Features/Decompiler/src/decompile/cpp/Doxyfile M Ghidra/Features/Decompiler/src/decompile/cpp/inject_sleigh.cc M Ghidra/Features/Decompiler/src/decompile/cpp/inject_sleigh.hh M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc M Ghidra/Features/Decompiler/src/decompile/datatests/retstruct.xml M Ghidra/Processors/AARCH64/data/languages/AARCH64.cspec M Ghidra/Processors/AARCH64/data/languages/AARCH64_win.cspec ``` Commit details: ``` [Commit 1/1] Hash: de842dbd32b0f27d9d7f222f039f6c8ebfa87598 Date: 2025-07-09 21:14:59 +0000 Message: GP-5816 Fix return recovery for AARCH64 and ARM Files changed: M Ghidra/Features/Decompiler/src/decompile/cpp/Doxyfile M Ghidra/Features/Decompiler/src/decompile/cpp/inject_sleigh.cc M Ghidra/Features/Decompiler/src/decompile/cpp/inject_sleigh.hh M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc M Ghidra/Features/Decompiler/src/decompile/datatests/retstruct.xml M Ghidra/Processors/AARCH64/data/languages/AARCH64.cspec M Ghidra/Processors/AARCH64/data/languages/AARCH64_win.cspec ``` --------- Co-authored-by: Eric Kilmer <eric.d.kilmer@gmail.com> |
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Eric Kilmer
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eadedecf28 |
Ghidra 11.4 (#345)
* Backport patch to fix datatests/restruct.xml testv11.4 |
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auto-updater[bot]
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7807d6619a |
Update Ghidra HEAD to commit 8c48d9f11 (#343)
Bump Ghidra HEAD commit 8c48d9f11 Changed files: ``` M Ghidra/Processors/AARCH64/data/languages/AARCH64instructions.sinc M Ghidra/Processors/AARCH64/data/languages/AARCH64neon.sinc M Ghidra/Processors/PA-RISC/build.gradle M Ghidra/Processors/RISCV/data/languages/riscv.rv32b.sinc M Ghidra/Processors/x86/data/languages/avx.sinc M Ghidra/Processors/x86/data/languages/avx512.sinc M Ghidra/Processors/x86/data/languages/ia.sinc M Ghidra/Processors/x86/data/languages/x86.ldefs ``` Commit details: ``` [Commit 1/6] Hash: 3d54c90cd604f43bf3029f27f714c37b3b3cd806 Date: 2025-05-30 20:47:03 -0400 Message: Fix RISC-V minu and max instructions' definitions (Closes #8215) Files changed: M Ghidra/Processors/RISCV/data/languages/riscv.rv32b.sinc [Commit 2/6] Hash: fe4244cbc952932b0923a34318021794ea2de805 Date: 2025-06-11 07:56:09 -0400 Message: GP-5622: Implemented pcode for several AARCH64 Neon instructions Files changed: M Ghidra/Processors/AARCH64/data/languages/AARCH64instructions.sinc M Ghidra/Processors/AARCH64/data/languages/AARCH64neon.sinc [Commit 3/6] Hash: b0750c2783b7ecadcd2d4dd62434a2bf09c0e7b3 Date: 2025-06-10 09:21:39 -0400 Message: GP-5725: Corrected operands for several AVX512 instructions Files changed: M Ghidra/Processors/x86/data/languages/avx.sinc M Ghidra/Processors/x86/data/languages/avx512.sinc M Ghidra/Processors/x86/data/languages/ia.sinc M Ghidra/Processors/x86/data/languages/x86.ldefs [Commit 4/6] Hash: 92f25888950324a9d6e3ddcdd36299e5bd5d1fa9 Date: 2025-06-09 15:17:05 -0400 Message: GP-0 Corrected build.gradle for PA-RISC to allow pcode test execution Files changed: M Ghidra/Processors/PA-RISC/build.gradle [Commit 5/6] Hash: 17d8fdfcfa2251d9e1aa386c87ae5a34b04e797e Date: 2025-06-09 18:48:09 -0400 Message: GP-0 corrected PA-RISC sleigh compile option Files changed: M Ghidra/Processors/PA-RISC/build.gradle [Commit 6/6] Hash: 2acf28604682cc72a5adb111f7acad44130f71f9 Date: 2025-06-09 15:17:05 -0400 Message: GP-0 Corrected build.gradle for PA-RISC to allow pcode test execution Files changed: M Ghidra/Processors/PA-RISC/build.gradle ``` |
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dependabot[bot]
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443cfcfdc7 |
build(deps): bump softprops/action-gh-release from 2.2.2 to 2.3.2 (#341)
Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2.2.2 to 2.3.2. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](https://github.com/softprops/action-gh-release/compare/v2.2.2...v2.3.2) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: 2.3.2 dependency-type: direct:production update-type: version-update:semver-minor ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
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auto-updater[bot]
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d888cdd5ea |
Update Ghidra HEAD to commit 5b0cac73c (#339)
Bump Ghidra HEAD commit 5b0cac73c Changed files: ``` M Ghidra/Processors/Z80/data/languages/z80.slaspec ``` Commit details: ``` [Commit 1/1] Hash: eb6fbb17ef9059b76d41942aa8268453d9ef4773 Date: 2025-05-13 14:24:39 +0000 Message: GP-5659: Fixed z80 sub instruction semantics Files changed: M Ghidra/Processors/Z80/data/languages/z80.slaspec ``` |