Add sanitizer and assertions CI jobs, fix UBSAN signed left shift
errors, and port the compareFinalOrder strict-weak ordering patch
to stable. Drop redundant Linux/macOS Debug builds in favor of
these more targeted checks.
* ekilmer/run-asan-v2:
Add compareFinalOrder strict-weak ordering patch to stable
Drop Debug builds on Linux and macOS in favor of sanitizer/assertions
Install LLVM explicitly in sanitizer and assertions CI jobs
Add libc++ assertions CI job for strict-weak ordering checks
Add ASAN/UBSAN CI testing and fix signed left shift UB
Port the existing HEAD patch (0007) to stable as well.
FlowBlock::compareFinalOrder returns true when both blocks have
index 0, violating strict weak ordering irreflexivity. This is
caught by the libc++ assertions CI job.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
The sanitizer and assertions CI jobs provide more useful Debug-like
coverage on Linux than a plain Debug build. Keep Debug builds only for
Windows where sanitizers are not available.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Use the official LLVM apt script to install clang rather than relying
on whichever version happens to ship on the runner. The version is
configured via a workflow-level LLVM_VERSION env variable (currently 21)
so bumping is a one-line change.
The assertions job also installs the matching versioned libc++-dev and
libc++abi-dev packages.
Remove CMAKE_CXX_COMPILER from the ci-assertions preset so the CXX
environment variable is respected by CMake in both CI and local use.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Add a ci-assertions CMake preset that builds with libc++ in debug
hardening mode (_LIBCPP_HARDENING_MODE_DEBUG), which catches STL
contract violations at runtime — most importantly strict-weak ordering
violations in comparators passed to std::sort.
Add a corresponding assertions CI job that runs HEAD-only, since new
comparator bugs from upstream Ghidra surface there first.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Add a sanitizer CI job that builds and tests with AddressSanitizer and
UndefinedBehaviorSanitizer using clang on Ubuntu for both stable and
HEAD release tracks.
Fix three UBSAN signed left shift errors found during sanitizer testing
by casting signed values to unsigned before left shifting:
- address.hh sign_extend(): left shift of negative value / overflow
- slghpatexpress.cc LeftShiftExpression: left shift of negative value
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Provides a sandboxed Ubuntu 24.04 environment with LLVM 21
(clang, clangd, lld, lldb, libc++), cmake, ninja, and ccache
for building and debugging the decompiler with up-to-date tooling.
While there are only minimal VSCode extensions installed by default, I
automatically install Claude Code and my own dotfiles plus additional tools
* Bump Ghidra HEAD commit e3c1b6393
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
A Ghidra/Features/Decompiler/src/decompile/cpp/bitfield.cc
A Ghidra/Features/Decompiler/src/decompile/cpp/bitfield.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/block.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/dynamic.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/flow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_block.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.y
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opcodes.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printjava.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.hh
```
Commit details:
```
[Commit 1/2]
Hash: bf1f4288aa3b317e3c097773ba4b8e7b89ae09c7
Date: 2026-02-10 19:33:46 +0000
Message: GP-5922 Integer formatting for switch cases
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/block.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/flow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_block.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printjava.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.hh
[Commit 2/2]
Hash: 402d10d6cc66e1fcf3d8f36bc851ef652773e018
Date: 2025-09-05 00:01:44 +0000
Message: GP-2493 Bitfield support in the Decompiler
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
A Ghidra/Features/Decompiler/src/decompile/cpp/bitfield.cc
A Ghidra/Features/Decompiler/src/decompile/cpp/bitfield.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/dynamic.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/grammar.y
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opcodes.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/printlanguage.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.hh
```
* Add new C++ files to CMake
* Fix more strict weak ordering issues
---------
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: Eric Kilmer <eric.kilmer@trailofbits.com>
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Processors/8051/data/languages/80251.sinc
M Ghidra/Processors/AARCH64/data/languages/AARCH64.pspec
M Ghidra/Processors/AARCH64/data/languages/AARCH64neon.sinc
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
M Ghidra/Processors/CR16/data/languages/CR16C.sinc
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
M Ghidra/Processors/PowerPC/data/languages/altivec.sinc
M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
```
Commit details:
```
[Commit 1/19]
Hash: 1660b9ca4718c9907d279653a99c6d4190a1071f
Date: 2026-02-09 15:33:05 +0000
Message: GP-6419: Fixed MIPS16 pcodetest failures
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 2/19]
Hash: a05ba1f778511e92abc29c933cb17da9477cc7c5
Date: 2026-02-05 23:13:56 +0000
Message: GP-6416 Add support for simplifying unequal LEFT then RIGHT shifts
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
[Commit 3/19]
Hash: 690a23344f9de200056b8e7af4384e26f42e300b
Date: 2026-02-05 19:28:59 +0000
Message: GP-6393 Deduplicate INDIRECT storage for HeapSequence
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.hh
[Commit 4/19]
Hash: 6ced49d1d7fd91663e7627b11fc4e68dd06bca1c
Date: 2026-02-03 16:08:01 +0000
Message: GP-4241: Discoverable per-arch userop-lib framework and AARCH64 port.
Files changed:
M Ghidra/Processors/AARCH64/data/languages/AARCH64.pspec
[Commit 5/19]
Hash: 9a9b6cd063bc830c749804be0ab4213ec8de0010
Date: 2026-01-29 20:26:27 +0000
Message: GP-6388 Adjust getInputCast for TypeOpPtradd and TypeOpPtrsub
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
[Commit 6/19]
Hash: c9be1860c181581ee192cb86e97eeec983a6bf00
Date: 2024-05-28 17:09:24 +0930
Message: AArch32: fixed ldrexd
Details:
* fixed addr src register aliased as first dest register of a double word load causing second word load at the value of first load
Files changed:
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
[Commit 7/19]
Hash: c0bc9a882b7e6c6d3c0549c4410a8ae1abb68f00
Date: 2024-02-08 10:19:47 +0100
Message: PowerPC VLE: Fix se_blrl flow
Details:
Opcode se_blrl is branch link register and link. Treating it as a return break flow and is wrong. Non VLE is already correct.
Files changed:
M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc
[Commit 8/19]
Hash: e94681701a89f34cf35edc18085684a8e40fc6b7
Date: 2025-12-02 02:03:52 +0100
Message: CR16: fix CR16C TBIT instruction
Files changed:
M Ghidra/Processors/CR16/data/languages/CR16C.sinc
[Commit 9/19]
Hash: af8a3704212b157d21bfddad834f6485fdfabeb1
Date: 2025-12-02 22:00:49 +0100
Message: Fix eBPF compare-and-exchange instruction
Details:
Linux kernel's documentation tells in
https://www.kernel.org/doc/html/v6.0/bpf/instruction-set.html#atomic-operations
> The BPF_CMPXCHG operation atomically compares the value addressed by
> dst_reg + off with R0. If they match, the value addressed by
> dst_reg + off is replaced with src_reg. In either case, the value that
> was at dst_reg + off before the operation is zero-extended and loaded
> back to R0.
If the values don't match, *(dst_reg + off) is not supposed to be
modified.
Moreover, register R0 is always modified and the 32-bit instruction
truncates its value (with a zero-extension). This is also clear in the
implementation of BPF_CMPXCHG in
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/core.c?h=v6.18#n2186
case BPF_CMPXCHG:
if (BPF_SIZE(insn->code) == BPF_W)
BPF_R0 = (u32) atomic_cmpxchg(
(atomic_t *)(unsigned long) (DST + insn->off),
(u32) BPF_R0, (u32) SRC);
else if (BPF_SIZE(insn->code) == BPF_DW)
BPF_R0 = (u64) atomic64_cmpxchg(
(atomic64_t *)(unsigned long) (DST + insn->off),
(u64) BPF_R0, (u64) SRC);
Fix the semantic of the compare-and-exchange instruction accordingly.
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
[Commit 10/19]
Hash: ff6eb2213bca878cdcef0e9cec20e524d8d9f944
Date: 2025-12-02 16:19:37 +0100
Message: Fix disassembly of eBPF atomic instructions
Details:
eBPF ISA v3 introduced atomic instructions:
https://www.kernel.org/doc/html/v6.0/bpf/instruction-set.html#atomic-operations
These instructions are encoded using BPF_ATOMIC | BPF_W | BPF_STX
and BPF_ATOMIC | BPF_DW | BPF_STX for 32-bit and 64-bit operations,
with:
BPF_ATOMIC = 0xc0
BPF_DW = 0x18
BPF_W = 0
BPF_STX = 0x03
While Ghidra's semantic section is constructed correctly (atomic add
uses an addition ; atomic or uses or ; ...), the disassembly always
displays STXXADDW and STXXADDDW. These mnemonics come from the
deprecated name BPF_XADD = BPF_ATOMIC | BPF_ADD = 0xc0.
Replace the confusing mnemonics with the ones used by binutils and
documented in
https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=gas/doc/c-bpf.texi;h=003cb92a457985038a9abc1ffbf347f636eb0586;hb=2bc7af1ff7732451b6a7b09462a815c3284f9613#l745
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
[Commit 11/19]
Hash: c1f97cde08ab235c0fe9adb723971a608550fdc2
Date: 2025-12-22 19:47:24 +0100
Message: Fix missing Altivec vadduws instruction
Files changed:
M Ghidra/Processors/PowerPC/data/languages/altivec.sinc
[Commit 12/19]
Hash: c981c0b5dd19818117178f3ce4a9d8737c306e65
Date: 2025-12-16 20:07:56 +0000
Message: GP-6004: Refactored out duplicated constructors
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 13/19]
Hash: 78859d55fdf28dfbe9dac0658948754515d44e36
Date: 2025-12-04 19:25:56 +0000
Message: GP-5905: Fixed issue with 80251 instructions referencing SPX register
Files changed:
M Ghidra/Processors/8051/data/languages/80251.sinc
[Commit 14/19]
Hash: 826834c424b631358f06899dfd0203138ba2cb7d
Date: 2025-11-25 13:32:37 +0100
Message: decompiler: Fix extreme value checks in Funcdata::replaceLessequal
Details:
Fixes https://github.com/NationalSecurityAgency/ghidra/issues/8696
The checks for extreme values when transforming <= to < were incomplete
and relied on undefined behavior, making compilers optimize them out.
Specifically, for SLESS_EQUAL, the decompiler relied on integer overflows.
For integers smaller than 8 bytes, no overflow will occur when adding 1,
resulting in a missed case and, thus, x <= INT_MAX will become x < INT_MIN.
For the signed case when subtracting one, the compiler removes the check
due to undefined behavior, resulting in another missed case.
To fix this, add helper functions for computing maximum and minimum values
for signed and unsigned varnodes and directly check for them.
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_op.cc
[Commit 15/19]
Hash: 2e3bedf7daf1c5c38cbf1c3f90b6f4cd449f7020
Date: 2025-11-04 13:50:15 +0000
Message: GP-6004: Corrected bit-pattern comments
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 16/19]
Hash: 49c13a7ba733f2af63f3d33d83cba8103456249e
Date: 2025-09-17 10:43:57 +0200
Message: missed one
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 17/19]
Hash: 48ca4badb7ea2eb18ffd6f9b6ede356932160067
Date: 2025-09-13 16:17:07 -0700
Message: forgot to take out this change
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 18/19]
Hash: 7fa6bda98ee9a350be49c0b4a8f9cf8c83b39490
Date: 2025-09-10 00:58:15 -0700
Message: remove destREG to fix double inc/dec
Files changed:
M Ghidra/Processors/PIC/data/languages/pic18_instructions.sinc
[Commit 19/19]
Hash: 5e4522fc3a2a547c9b1c94ab293890bb9f767ac3
Date: 2024-04-09 16:43:13 +0930
Message: AA64: Change sha1h shift to rotate
Files changed:
M Ghidra/Processors/AARCH64/data/languages/AARCH64neon.sinc
```
---------
Co-authored-by: Eric Kilmer <eric.d.kilmer@gmail.com>
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Add functionality to the weekly sync workflow to detect newly added or
deleted C++ source files and spec files that may require manual CMake
configuration updates. When such files are detected, the PR body will
include a warning section listing the files and instructions for
maintainers.
This addresses issue #121 where new files added to Sleigh in Ghidra
weren't being noticed, leading to missing headers that required manual
fixes later.
Changes:
- Add CategorizedChanges dataclass to track added/deleted cpp/spec files
- Add helper methods to parse git status and categorize files
- Expand IGNORED_EXTENSIONS to filter more non-relevant file types
- Set new GitHub Actions outputs: needs_manual_intervention and
intervention_details
- Update workflow to conditionally add warning section to PR body
Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
Reduces third-party dependencies by using native git commands and the
pre-installed gh CLI instead of the peter-evans/create-pull-request
action. Adds idempotency check to skip if PR already exists for branch.
Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
Bump Ghidra HEAD commit 549735683
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/sleighbase.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.y
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.hh
M Ghidra/Processors/RISCV/data/languages/riscv.opinion
```
Commit details:
```
[Commit 1/7]
Hash: 6208df2d50d716b4faf87d3a0c0603d45aac4cb3
Date: 2026-01-13 10:44:59 -0500
Message: GP-1 Corrected RISCV import opinion file
Files changed:
M Ghidra/Processors/RISCV/data/languages/riscv.opinion
[Commit 2/7]
Hash: 1789bb9c5e66cb1e5ad2072b73c4bf7fbc713f67
Date: 2026-01-12 21:00:06 -0500
Message: GP-1 minor doc fix
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
[Commit 3/7]
Hash: 7828f235d315807d18ecb873fad34b209a02ce65
Date: 2026-01-12 21:51:54 +0000
Message: GP-6316 Increase maximum temporary size for SLEIGH to 256 bytes
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/sleighbase.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
[Commit 4/7]
Hash: 4830a7ab99548aa898e861b967f48c92dd741f48
Date: 2026-01-12 19:33:12 +0000
Message: GP-6314 Reset label counter for every named section
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slghparse.y
[Commit 5/7]
Hash: 123bd5cbe6d54105c96bb8a0b5c1b81f84b29e97
Date: 2026-01-09 20:37:38 +0000
Message: GP-6310 Apply extension patch if consumption is beyond small variable
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.hh
[Commit 6/7]
Hash: 451334568f3200f453b6b3985b5949f72747f1c6
Date: 2026-01-09 20:15:16 +0000
Message: Let RuleShiftAnd apply in more situations
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
[Commit 7/7]
Hash: 92091a7a2ad59309514d808c7eb890492f5c49e8
Date: 2025-12-02 10:59:10 +0100
Message: decompiler: fix bit extractions with RuleShiftAnd and RuleShiftCompare
Details:
Fixes https://github.com/NationalSecurityAgency/ghidra/issues/8717
RuleShiftAnd previously replaced the AND opcode with COPY. This,
however doesn't update the NZMask of the Varnode. As a result, following
rules may assume the NZMask after the AND operation also applies to the
Varnode being copied.
In combination with RuleShiftCompare, an expression of the form
(a & bitmask) >> const != 0, wrongfully is reduced to a != 0.
Instead of replacing the AND with COPY, we now replace the input
of the shift operation instead. This way, future rules will see
the correct NZMask.
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
```
Bump Ghidra HEAD commit 6ef256cef
Changed files:
```
M Ghidra/Processors/AARCH64/data/languages/AARCH64.ldefs
M Ghidra/Processors/AARCH64/data/languages/AARCH64.opinion
M Ghidra/Processors/x86/data/languages/x86.opinion
```
Commit details:
```
[Commit 1/1]
Hash: ad00d5734f82266e7d58624a36075da33d8e3005
Date: 2025-12-23 19:04:43 -0500
Message: GP-3960: ElfLoader can now recognize Swift and golang
Files changed:
M Ghidra/Processors/AARCH64/data/languages/AARCH64.ldefs
M Ghidra/Processors/AARCH64/data/languages/AARCH64.opinion
M Ghidra/Processors/x86/data/languages/x86.opinion
```
Bump Ghidra HEAD commit dc5836119
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/sleigh.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
```
Commit details:
```
[Commit 1/4]
Hash: 19836741896fd7664c9de9519a8841f9b593ae9f
Date: 2025-12-17 19:52:07 +0000
Message: GP-6237 Move the unique crossbuild region to more significant bits
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/sleigh.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
[Commit 2/4]
Hash: b8e698d97804de62a7dbf6664b0e3f264725c3d9
Date: 2025-09-12 20:10:43 +0000
Message: GP-3834 Allow 256 case switch, if a LOAD is present
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
[Commit 3/4]
Hash: 6451d3d3135ba72a4c50f40667ad893b2c944de6
Date: 2025-12-12 00:17:12 +0000
Message: GP-6224 Don't resolve pointer if cast still required
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
[Commit 4/4]
Hash: 9692dd064064ee712d8a724984f1b6b2bec4bc75
Date: 2025-12-10 19:26:03 +0000
Message: GP-6201 Check for free varnodes in functionalEqualityLevel0
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
```
Bump Ghidra HEAD commit d83ea1754
Changed files:
```
A Ghidra/Processors/NDS32/Module.manifest
A Ghidra/Processors/NDS32/build.gradle
A Ghidra/Processors/NDS32/certification.manifest
A Ghidra/Processors/NDS32/data/languages/lsmw.sinc
A Ghidra/Processors/NDS32/data/languages/nds32.cspec
A Ghidra/Processors/NDS32/data/languages/nds32.dwarf
A Ghidra/Processors/NDS32/data/languages/nds32.ldefs
A Ghidra/Processors/NDS32/data/languages/nds32.opinion
A Ghidra/Processors/NDS32/data/languages/nds32.pspec
A Ghidra/Processors/NDS32/data/languages/nds32.sinc
A Ghidra/Processors/NDS32/data/languages/nds32be.slaspec
A Ghidra/Processors/NDS32/data/languages/nds32le.slaspec
A Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml
A Ghidra/Processors/NDS32/data/patterns/patternconstraints.xml
M Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc
```
Commit details:
```
[Commit 1/9]
Hash: d0f88bf9023ac412b50460fe9e0ac5fc76f14d90
Date: 2025-12-04 12:28:50 -0500
Message: GP-6007 Remove Decompiler dependency
Files changed:
M Ghidra/Processors/NDS32/build.gradle
[Commit 2/9]
Hash: 923ceb52d4727a2227a8b2512593ec4fb03ab0e2
Date: 2025-12-04 11:25:54 -0500
Message: GP-6007 use -l sleigh compile option with NDS32
Files changed:
M Ghidra/Processors/NDS32/build.gradle
[Commit 3/9]
Hash: ddf4ad1182577f759b1c0e7c40d8825abd65b357
Date: 2025-12-03 22:06:38 +0000
Message: GP-6007 minor fixes for Andestar v5
Files changed:
M Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc
[Commit 4/9]
Hash: 2efa886f5ca0996d3ea9f1865d952aa2708389b6
Date: 2025-12-03 21:36:18 +0000
Message: GP-6007 minor fixes for mfusr, mtusr and csreg space as global in cspec
Files changed:
M Ghidra/Processors/NDS32/data/languages/nds32.cspec
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
[Commit 5/9]
Hash: df6e4049d4f91f8cb9c9ff3888bb5f2a15a411d8
Date: 2025-12-02 20:21:14 +0000
Message: GP-6007: Added additional floating point config instructions
Files changed:
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
[Commit 6/9]
Hash: 9bdd19cc087f889a16421b7cda082e2a08653449
Date: 2025-12-02 15:30:45 +0000
Message: GP-6007: Added CSR space and CSRs
Files changed:
M Ghidra/Processors/NDS32/data/languages/lsmw.sinc
M Ghidra/Processors/NDS32/data/languages/nds32.pspec
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
[Commit 7/9]
Hash: ed4ae8bfa1f6b5db8c7356b2a4253c4c647e65f4
Date: 2025-11-26 20:19:40 +0000
Message: GP-6007: Added stubs for nds32 FPU instructions
Files changed:
M Ghidra/Processors/NDS32/build.gradle
M Ghidra/Processors/NDS32/data/languages/nds32.ldefs
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
M Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml
[Commit 8/9]
Hash: 71cd33572c873b1eebd322032506c259632d0d52
Date: 2025-09-22 14:37:16 +0000
Message: GP-6007: Updated NDS32 analyzer and elf relocation handler and test fixups
Files changed:
M Ghidra/Processors/NDS32/build.gradle
A Ghidra/Processors/NDS32/certification.manifest
D Ghidra/Processors/NDS32/data/buildLanguage.xml
M Ghidra/Processors/NDS32/data/languages/lsmw.sinc
M Ghidra/Processors/NDS32/data/languages/nds32.cspec
M Ghidra/Processors/NDS32/data/languages/nds32.sinc
M Ghidra/Processors/NDS32/data/languages/nds32be.slaspec
M Ghidra/Processors/NDS32/data/languages/nds32le.slaspec
D Ghidra/Processors/NDS32/data/sleighArgs.txt
[Commit 9/9]
Hash: fa7c3b1fec5e133f5147b6c541d023c646c0b170
Date: 2020-04-16 18:58:10 +0200
Message: [NDS32] Add support for the NDS32 Processor
Files changed:
A Ghidra/Processors/NDS32/Module.manifest
A Ghidra/Processors/NDS32/build.gradle
A Ghidra/Processors/NDS32/data/buildLanguage.xml
A Ghidra/Processors/NDS32/data/languages/lsmw.sinc
A Ghidra/Processors/NDS32/data/languages/nds32.cspec
A Ghidra/Processors/NDS32/data/languages/nds32.dwarf
A Ghidra/Processors/NDS32/data/languages/nds32.ldefs
A Ghidra/Processors/NDS32/data/languages/nds32.opinion
A Ghidra/Processors/NDS32/data/languages/nds32.pspec
A Ghidra/Processors/NDS32/data/languages/nds32.sinc
A Ghidra/Processors/NDS32/data/languages/nds32be.slaspec
A Ghidra/Processors/NDS32/data/languages/nds32le.slaspec
A Ghidra/Processors/NDS32/data/patterns/nds32_patterns.xml
A Ghidra/Processors/NDS32/data/patterns/patternconstraints.xml
A Ghidra/Processors/NDS32/data/sleighArgs.txt
```
Bump Ghidra HEAD commit be482754a
Changed files:
```
M Ghidra/Processors/ARM/data/languages/ARM.ldefs
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
M Ghidra/Processors/ARM/data/patterns/ARM_BE_patterns.xml
M Ghidra/Processors/ARM/data/patterns/ARM_LE_patterns.xml
M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml
M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml
M Ghidra/Processors/RISCV/certification.manifest
A Ghidra/Processors/RISCV/data/languages/RV32.pspec
D Ghidra/Processors/RISCV/data/languages/RV32G.pspec
D Ghidra/Processors/RISCV/data/languages/RV32GC.pspec
D Ghidra/Processors/RISCV/data/languages/RV32I.pspec
D Ghidra/Processors/RISCV/data/languages/RV32IC.pspec
D Ghidra/Processors/RISCV/data/languages/RV32IMC.pspec
A Ghidra/Processors/RISCV/data/languages/RV64.pspec
D Ghidra/Processors/RISCV/data/languages/RV64G.pspec
D Ghidra/Processors/RISCV/data/languages/RV64GC.pspec
D Ghidra/Processors/RISCV/data/languages/RV64I.pspec
D Ghidra/Processors/RISCV/data/languages/RV64IC.pspec
A Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc
A Ghidra/Processors/RISCV/data/languages/andestar_v5.ldefs
A Ghidra/Processors/RISCV/data/languages/andestar_v5.slaspec
A Ghidra/Processors/RISCV/data/languages/old/riscv_deprecated.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv.csr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.ilp32d.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.instr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv.lp64d.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.rvc.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.rvv.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.table.sinc
M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv32.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64.cspec
M Ghidra/Processors/SuperH/data/languages/superh.sinc
M Ghidra/Processors/Xtensa/data/languages/xtensaArch.sinc
M Ghidra/Processors/Xtensa/data/languages/xtensaInstructions.sinc
```
Commit details:
```
[Commit 1/6]
Hash: c3a2482e186185c86ba98b93044aa032fad48ce2
Date: 2025-11-05 14:39:41 -0500
Message: GP-5975 Eliminated unused NotFoundException from Memory methods. Revised import to always include pspec symbols within pcode-defined memory blocks. Added label name check. Revised language version upgrade to handle certain pspec-defined block and symbol changes. Corrected RISC-V 64-bit-fp cspec.
Files changed:
M Ghidra/Processors/RISCV/certification.manifest
A Ghidra/Processors/RISCV/data/languages/old/riscv_deprecated.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec
[Commit 2/6]
Hash: ade1ad71ba5b80e910fcd98ad688f658439724a5
Date: 2025-09-30 17:08:48 +0000
Message: GP-5975 Refactored RISCV custom instruction, sinc file layout, simplified context, and moved csr register definitions to be in a special csreg ram space. Deprecated all most RISCV variants other than default. Added andestar V5 RISCV variant.
Files changed:
M Ghidra/Processors/RISCV/certification.manifest
A Ghidra/Processors/RISCV/data/languages/RV32.pspec
D Ghidra/Processors/RISCV/data/languages/RV32G.pspec
D Ghidra/Processors/RISCV/data/languages/RV32GC.pspec
D Ghidra/Processors/RISCV/data/languages/RV32I.pspec
D Ghidra/Processors/RISCV/data/languages/RV32IC.pspec
D Ghidra/Processors/RISCV/data/languages/RV32IMC.pspec
A Ghidra/Processors/RISCV/data/languages/RV64.pspec
D Ghidra/Processors/RISCV/data/languages/RV64G.pspec
D Ghidra/Processors/RISCV/data/languages/RV64GC.pspec
D Ghidra/Processors/RISCV/data/languages/RV64I.pspec
D Ghidra/Processors/RISCV/data/languages/RV64IC.pspec
A Ghidra/Processors/RISCV/data/languages/andestar_v5.instr.sinc
A Ghidra/Processors/RISCV/data/languages/andestar_v5.ldefs
A Ghidra/Processors/RISCV/data/languages/andestar_v5.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.csr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.ilp32d.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.instr.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.ldefs
M Ghidra/Processors/RISCV/data/languages/riscv.lp64d.slaspec
M Ghidra/Processors/RISCV/data/languages/riscv.reg.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.rvc.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.rvv.sinc
M Ghidra/Processors/RISCV/data/languages/riscv.table.sinc
M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv32.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64.cspec
[Commit 3/6]
Hash: 0b60036f8fd0dd3cc70233fd3294d38755b7b525
Date: 2025-10-19 17:36:58 +0300
Message: SuperH fix 'bclr' opcode
Files changed:
M Ghidra/Processors/SuperH/data/languages/superh.sinc
[Commit 4/6]
Hash: 2419b08085dbfdf9a0ae8934526ebc7c30abce87
Date: 2025-11-06 18:47:35 +0000
Message: GP-6072 Fixed thunk detection and thunk address for Position Independent Code thunks that call to load a link register that is turned into a jump.
Files changed:
M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml
M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml
[Commit 5/6]
Hash: 3a0736f2647e5c095222473cebbdcad6a25c13a4
Date: 2025-10-03 15:47:44 -0500
Message: Xtensa: BE: Corrected decoding of the following instructions: BBCI, BBSI, BEQZ.N, BNEZ.N, DEPBITS, EXTUI, LDDEC, LDINC, MOVI.N, MUL.AD.*, MULA.AD.*, MUL.DA.*, MUL.DD.*, MULA.DA.*, MULA.DD.*, SLLI, SRAI, SSAI (Closes#8544, Closes#8537)
Files changed:
M Ghidra/Processors/Xtensa/data/languages/xtensaArch.sinc
M Ghidra/Processors/Xtensa/data/languages/xtensaInstructions.sinc
[Commit 6/6]
Hash: 5924914b47881f5ab936b52ac7649493cb2268c9
Date: 2025-10-30 20:21:11 +0000
Message: GP-6079 ARM instruction CPY into PC with LR set before it is now a call. Also fixed a function start pattern, and spurious references placed on stack save of the PC.
Files changed:
M Ghidra/Processors/ARM/data/languages/ARM.ldefs
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
M Ghidra/Processors/ARM/data/patterns/ARM_BE_patterns.xml
M Ghidra/Processors/ARM/data/patterns/ARM_LE_patterns.xml
```
Bump Ghidra HEAD commit 4b1fd2254
Changed files:
```
M Ghidra/Processors/PA-RISC/data/languages/pa-risc.opinion
M Ghidra/Processors/x86/certification.manifest
A Ghidra/Processors/x86/data/extensions/rust/unix32/cc.xml
R100 Ghidra/Processors/x86/data/extensions/rust/unix/probe_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix32/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix32/try_fixup.xml
R100 Ghidra/Processors/x86/data/extensions/rust/unix/cc.xml Ghidra/Processors/x86/data/extensions/rust/unix64/cc.xml
R100 Ghidra/Processors/x86/data/extensions/rust/windows/probe_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix64/probe_fixup.xml
R100 Ghidra/Processors/x86/data/extensions/rust/unix/try_fixup.xml Ghidra/Processors/x86/data/extensions/rust/unix64/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows32/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows32/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows64/probe_fixup.xml
R100 Ghidra/Processors/x86/data/extensions/rust/windows/try_fixup.xml Ghidra/Processors/x86/data/extensions/rust/windows64/try_fixup.xml
```
Commit details:
```
[Commit 1/2]
Hash: bb63706226732c5f0c14cf01ae934a2cd6622fb6
Date: 2025-10-09 08:06:13 -0400
Message: GP-5942: Loader for "System Object Model" binaries
Files changed:
M Ghidra/Processors/PA-RISC/data/languages/pa-risc.opinion
[Commit 2/2]
Hash: 95ad48cdb371aeef15892767f4962ab1712db86f
Date: 2025-10-28 17:22:13 +0000
Message: GP-4711 Fix for import of 32-bit x86 Unix/Windows Rust binaries
Files changed:
M Ghidra/Processors/x86/certification.manifest
D Ghidra/Processors/x86/data/extensions/rust/unix/cc.xml
D Ghidra/Processors/x86/data/extensions/rust/unix/probe_fixup.xml
D Ghidra/Processors/x86/data/extensions/rust/unix/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix32/cc.xml
A Ghidra/Processors/x86/data/extensions/rust/unix32/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix32/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix64/cc.xml
A Ghidra/Processors/x86/data/extensions/rust/unix64/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/unix64/try_fixup.xml
D Ghidra/Processors/x86/data/extensions/rust/windows/probe_fixup.xml
D Ghidra/Processors/x86/data/extensions/rust/windows/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows32/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows32/try_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows64/probe_fixup.xml
A Ghidra/Processors/x86/data/extensions/rust/windows64/try_fixup.xml
```
Co-authored-by: pgoodman <43664+pgoodman@users.noreply.github.com>
Bump Ghidra HEAD commit 96506554e
Changed files:
```
M Ghidra/Processors/AARCH64/certification.manifest
A Ghidra/Processors/AARCH64/data/languages/AARCH64_apple.cspec
M Ghidra/Processors/AARCH64/data/languages/AppleSilicon.ldefs
M Ghidra/Processors/x86/data/languages/x86-64-win.cspec
M Ghidra/Processors/x86/data/languages/x86win.cspec
M Ghidra/Processors/x86/data/patterns/x86-64gcc_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86-64win_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86gcc_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml
M Ghidra/Processors/x86/data/patterns/x86win_patterns.xml
```
Commit details:
```
[Commit 1/4]
Hash: dc069a18c602b71dbbb3bb7d150adb5b39565b8f
Date: 2025-09-24 18:06:03 +0000
Message: GP-5287 Added ENDBR jump target checking instructions as function start patterns for x86 gcc binaries
Files changed:
M Ghidra/Processors/x86/data/patterns/x86-64gcc_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86gcc_patterns.xml
[Commit 2/4]
Hash: 69ed84a069255d06e500691dfd9229067bb8b209
Date: 2025-09-24 18:03:10 +0000
Message: GP-5526 bug fix for .plt.sec and pattern matching optimization
Files changed:
M Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml
[Commit 3/4]
Hash: 0815f463f543e0f09e582de612e04b612460bc4d
Date: 2025-09-24 18:01:43 +0000
Message: GP-5998 Added security_check_cookie function patterns and callfixup for VS2022 based binaries.
Files changed:
M Ghidra/Processors/x86/data/languages/x86-64-win.cspec
M Ghidra/Processors/x86/data/languages/x86win.cspec
M Ghidra/Processors/x86/data/patterns/x86-64win_patterns.xml
M Ghidra/Processors/x86/data/patterns/x86win_patterns.xml
[Commit 4/4]
Hash: 6e81a370ce02a1e9e65fe7d9d02240e8773ec8bb
Date: 2025-09-11 17:36:37 +0000
Message: GP-3139 added cspec for AARCH64 apple silicon
Files changed:
M Ghidra/Processors/AARCH64/certification.manifest
A Ghidra/Processors/AARCH64/data/languages/AARCH64_apple.cspec
M Ghidra/Processors/AARCH64/data/languages/AppleSilicon.ldefs
```
Bump Ghidra HEAD commit 1ae4378cf
Changed files:
```
M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc
M Ghidra/Processors/tricore/data/languages/tricore.ldefs
M Ghidra/Processors/x86/certification.manifest
M Ghidra/Processors/x86/data/patterns/prepatternconstraints.xml
A Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml
```
Commit details:
```
[Commit 1/4]
Hash: 24b2275c0b7bbdb30243d6b3877d0a5fb852243a
Date: 2023-09-05 10:03:20 -0400
Message: tmp assigned rd0 instead of LR
Files changed:
M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc
[Commit 2/4]
Hash: be7458a4369e8b0ec0988f96d33a71b33912e750
Date: 2023-08-29 09:24:37 -0400
Message: Update avr32a_instruction_flow.sinc
Details:
The specification for avr32 says the LR register should be reserved for using return addresses, but in reality older compilers seem to use it to hold addresses for ICALL. When they do so without this fix the value in LR is immediately overwritten and during analysis only appears to be a function call to the opcode immediately after ICALL.
Files changed:
M Ghidra/Processors/Atmel/data/languages/avr32a_instruction_flow.sinc
[Commit 3/4]
Hash: 4b6d90366c8569b5d780dd14a74445957db55582
Date: 2025-09-10 22:55:14 +0000
Message: GP-5526 Added section tag to function start patterns. New thunk patterns in x86 gcc .plt section. Changed priority of pre analyzer and disassembly.
Files changed:
M Ghidra/Processors/x86/certification.manifest
M Ghidra/Processors/x86/data/patterns/prepatternconstraints.xml
A Ghidra/Processors/x86/data/patterns/x86gcc_prepatterns.xml
[Commit 4/4]
Hash: 18a7f952c89be6951f4b3bf549a54daff5720cfd
Date: 2024-11-08 15:39:42 +0100
Message: Processors: Rename TriCore Siemens to Infineon
Files changed:
M Ghidra/Processors/tricore/data/languages/tricore.ldefs
```
Bump Ghidra HEAD commit 970c8fbdd
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml
```
Commit details:
```
[Commit 1/1]
Hash: ce09332fcdd011758d23a2505eced5949ffcc253
Date: 2025-09-02 18:17:49 +0000
Message: GP-4214 Allow INT_ADD in the iblock
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
M Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml
```
Bump Ghidra HEAD commit f501ffccd
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/double.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.hh
A Ghidra/Features/Decompiler/src/decompile/datatests/condconst2.xml
A Ghidra/Features/Decompiler/src/decompile/datatests/condconstsub.xml
M Ghidra/Processors/x86/data/languages/x86gcc.cspec
```
Commit details:
```
[Commit 1/2]
Hash: e412f13b30b54acdcfb85ae248f53edaac28598f
Date: 2025-08-25 19:09:30 +0000
Message: GP-5950 Add support for multipath conditional constants
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/double.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.hh
A Ghidra/Features/Decompiler/src/decompile/datatests/condconst2.xml
A Ghidra/Features/Decompiler/src/decompile/datatests/condconstsub.xml
[Commit 2/2]
Hash: 6229740f8b86198d5a32d881c852bc1d448be6ad
Date: 2025-08-27 19:15:30 +0000
Message: GP-5958 added callfixup for get_pc_thunk.di to x86gcc.cspec
Files changed:
M Ghidra/Processors/x86/data/languages/x86gcc.cspec
```
* Add new source files
* Bump Ghidra HEAD commit 7a4100d54
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M Ghidra/Features/Decompiler/src/decompile/cpp/cast.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
A Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
A Ghidra/Features/Decompiler/src/decompile/cpp/expression.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/merge.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/variable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.hh
M Ghidra/Features/Decompiler/src/decompile/unittests/testparamstore.cc
M Ghidra/Features/Decompiler/src/decompile/unittests/testtypes.cc
M Ghidra/Processors/MIPS/certification.manifest
M Ghidra/Processors/MIPS/data/languages/mips.ldefs
R068 Ghidra/Processors/MIPS/data/languages/mips32be_eabi.cspec Ghidra/Processors/MIPS/data/languages/mips32_eabi.cspec
M Ghidra/Processors/MIPS/data/languages/mips32be.cspec
M Ghidra/Processors/MIPS/data/languages/mips32le.cspec
D Ghidra/Processors/MIPS/data/languages/mips32le_eabi.cspec
D Ghidra/Processors/MIPS/data/languages/mips64.cspec
A Ghidra/Processors/MIPS/data/languages/mips64be.cspec
A Ghidra/Processors/MIPS/data/languages/mips64le.cspec
M Ghidra/Processors/PowerPC/certification.manifest
M Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc
M Ghidra/Processors/PowerPC/data/languages/SPE_EFV.sinc
M Ghidra/Processors/PowerPC/data/languages/evx.sinc
M Ghidra/Processors/PowerPC/data/languages/ppc.ldefs
R070 Ghidra/Processors/PowerPC/data/languages/ppc_32_le.cspec Ghidra/Processors/PowerPC/data/languages/ppc_32.cspec
D Ghidra/Processors/PowerPC/data/languages/ppc_32_be.cspec
M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500_be.slaspec
M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500_le.slaspec
M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500mc_be.slaspec
M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500mc_le.slaspec
A Ghidra/Processors/PowerPC/data/languages/ppc_64_be.cspec
R058 Ghidra/Processors/PowerPC/data/languages/ppc_64.cspec Ghidra/Processors/PowerPC/data/languages/ppc_64_le.cspec
M Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc
M Ghidra/Processors/PowerPC/data/languages/ppc_embedded.sinc
M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc
M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml
M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml
M Ghidra/Processors/x86/data/languages/ia.sinc
```
Commit details:
```
[Commit 1/6]
Hash: f6495e4146e7ae5bebe1d4258793618f196eb6fa
Date: 2025-07-15 23:09:23 +0000
Message: GP-5851 Fix tiling truncations for odd data-type sizes in MultiSlotAssign. Fix for big endian multi-slot return value.
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/cast.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh
M Ghidra/Features/Decompiler/src/decompile/unittests/testparamstore.cc
M Ghidra/Features/Decompiler/src/decompile/unittests/testtypes.cc
[Commit 2/6]
Hash: f391ddb87c88e553b84cc34a696509a01b08e7f5
Date: 2025-08-26 11:59:06 -0400
Message: GP-5945 Fixed PowerPC e500 instruction extension issues and added function start pattern variants.
Files changed:
M Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc
M Ghidra/Processors/PowerPC/data/languages/SPE_EFV.sinc
M Ghidra/Processors/PowerPC/data/languages/evx.sinc
M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500_be.slaspec
M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500_le.slaspec
M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500mc_be.slaspec
M Ghidra/Processors/PowerPC/data/languages/ppc_32_e500mc_le.slaspec
M Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc
M Ghidra/Processors/PowerPC/data/languages/ppc_embedded.sinc
M Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc
M Ghidra/Processors/PowerPC/data/patterns/PPC_BE_patterns.xml
M Ghidra/Processors/PowerPC/data/patterns/PPC_LE_patterns.xml
[Commit 3/6]
Hash: 393e7935af660c07e2139f99468f0f32125fae99
Date: 2025-08-26 08:33:50 -0400
Message: GP-5906: Added x86 SSE4a instructions
Files changed:
M Ghidra/Processors/x86/data/languages/ia.sinc
[Commit 4/6]
Hash: d9a5ad2ed0bd888fa950ccf1bf16cf9b6f8211e4
Date: 2025-08-25 19:31:22 +0000
Message: GP-4029 updated mips and ppc language versions
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips.ldefs
M Ghidra/Processors/PowerPC/data/languages/ppc.ldefs
[Commit 5/6]
Hash: d91aebe74e801d49bf9d37805256e60db465a8d3
Date: 2025-02-25 20:50:19 +0000
Message: GP-4030: Fix MIPS base and eabi 32/64-bit cspecs GP-4029: Update base PowerPC 32/64-bit cspecs
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh
M Ghidra/Processors/MIPS/certification.manifest
M Ghidra/Processors/MIPS/data/languages/mips.ldefs
A Ghidra/Processors/MIPS/data/languages/mips32_eabi.cspec
M Ghidra/Processors/MIPS/data/languages/mips32be.cspec
D Ghidra/Processors/MIPS/data/languages/mips32be_eabi.cspec
M Ghidra/Processors/MIPS/data/languages/mips32le.cspec
D Ghidra/Processors/MIPS/data/languages/mips32le_eabi.cspec
D Ghidra/Processors/MIPS/data/languages/mips64.cspec
A Ghidra/Processors/MIPS/data/languages/mips64be.cspec
A Ghidra/Processors/MIPS/data/languages/mips64le.cspec
M Ghidra/Processors/PowerPC/certification.manifest
M Ghidra/Processors/PowerPC/data/languages/ppc.ldefs
A Ghidra/Processors/PowerPC/data/languages/ppc_32.cspec
D Ghidra/Processors/PowerPC/data/languages/ppc_32_be.cspec
D Ghidra/Processors/PowerPC/data/languages/ppc_32_le.cspec
D Ghidra/Processors/PowerPC/data/languages/ppc_64.cspec
A Ghidra/Processors/PowerPC/data/languages/ppc_64_be.cspec
A Ghidra/Processors/PowerPC/data/languages/ppc_64_le.cspec
[Commit 6/6]
Hash: 8217593e87635153066b8ea7a11d19e1ea02a555
Date: 2025-08-18 23:21:42 +0000
Message: GP-5934 Fix handling of integer minimum in SBORROW, SLESS rules, add SCARRY rule.
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
A Ghidra/Features/Decompiler/src/decompile/cpp/expression.cc
A Ghidra/Features/Decompiler/src/decompile/cpp/expression.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/merge.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/variable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.hh
```
---------
Co-authored-by: Eric Kilmer <eric.d.kilmer@gmail.com>
Bump Ghidra HEAD commit 4fcc1febd
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/pcodecompile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/semantics.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/semantics.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
A Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml
M Ghidra/Processors/8051/data/languages/80251.sinc
M Ghidra/Processors/8051/data/languages/8051_main.sinc
M Ghidra/Processors/AARCH64/data/languages/AARCH64_swift.cspec
M Ghidra/Processors/MCS96/data/languages/MCS96.sinc
M Ghidra/Processors/PIC/data/languages/PIC24.sinc
M Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc
M Ghidra/Processors/PowerPC/data/languages/altivec.sinc
M Ghidra/Processors/SuperH/data/languages/superh.cspec
M Ghidra/Processors/SuperH/data/languages/superh2a.cspec
M Ghidra/Processors/x86/data/languages/x86-64-swift.cspec
```
Commit details:
```
[Commit 1/7]
Hash: 3abf7f765e6d045d152589a7f73c8b4fea6c35a5
Date: 2025-08-21 06:42:41 -0400
Message: GP-0: Updating Swift documentation links
Files changed:
M Ghidra/Processors/AARCH64/data/languages/AARCH64_swift.cspec
M Ghidra/Processors/x86/data/languages/x86-64-swift.cspec
[Commit 2/7]
Hash: 42115f6df02329a745a3878aafa96439088deaf0
Date: 2025-08-18 17:12:23 +0000
Message: GP-5581: Allow optimization by truncation of subpieced unique varnodes.
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/pcodecompile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/semantics.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/semantics.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slgh_compile.hh
M Ghidra/Processors/MCS96/data/languages/MCS96.sinc
M Ghidra/Processors/PIC/data/languages/PIC24.sinc
M Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc
M Ghidra/Processors/PowerPC/data/languages/altivec.sinc
[Commit 3/7]
Hash: bb19782c35fd087d636f1dd5e41f9c5c02ac94ce
Date: 2025-08-11 20:27:21 +0000
Message: GP-5927 Add support for SUBPIECE removal in ConditionalExecution
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/condexe.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
A Ghidra/Features/Decompiler/src/decompile/datatests/condexesub.xml
[Commit 4/7]
Hash: 9c9938e0662fa3b5cb48a79a10bf5e53edddb19b
Date: 2025-07-30 19:32:34 +0000
Message: GP-5889 Check for common source in duplicated switch guard detection
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.hh
[Commit 5/7]
Hash: 28313c6574c61da69299fda185b884e2c785d7c1
Date: 2025-08-07 12:44:05 +0000
Message: GP-5912 Adding SH2 GBR register to the preserved by call list
Files changed:
M Ghidra/Processors/SuperH/data/languages/superh.cspec
M Ghidra/Processors/SuperH/data/languages/superh2a.cspec
[Commit 6/7]
Hash: e7cad294c9b0a19ec9d74ef733e31451fb47c468
Date: 2025-07-29 14:59:32 +0100
Message: Fix 80251 "ANL Rm,#data" showing as "ADD"
Details:
Should be self explanatory, looks like it was just a typo.
Files changed:
M Ghidra/Processors/8051/data/languages/80251.sinc
[Commit 7/7]
Hash: cca3fcc208f9f1f8f69f60ed58dd470f976bddf0
Date: 2025-07-29 14:57:07 +0100
Message: Fix ANL Areg,Data for 80251 in source mode
Details:
ANL Areg,Data should be GROUP1 rather than GROUP2, the incorrect group causes the instruction to fail to decode on source mode 80251
Files changed:
M Ghidra/Processors/8051/data/languages/8051_main.sinc
```
Bump Ghidra HEAD commit 98b938cc6
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/block.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/block.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/blockaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
M Ghidra/Processors/x86/data/languages/x86-64.dwarf
M Ghidra/Processors/x86/data/languages/x86.dwarf
```
Commit details:
```
[Commit 1/2]
Hash: e908ab6fbf4311f99fa86d50b60aa4802a6e3fd6
Date: 2025-08-11 11:21:28 -0400
Message: DWARF expression handling refactor
Details:
Cleanup logic of expression evaluation, stub out resolution of register
values to a callback in case we want to use constant propagation to try
to allow successful calculations, and add support for default static
values for treating an arch's stack frame register (e.g. RBP) like the
static CFA value we already have support for.
Add option to decorate params and local vars with their DWARF storage
location info.
Handle arrays with unspecified element type.
Files changed:
M Ghidra/Processors/x86/data/languages/x86-64.dwarf
M Ghidra/Processors/x86/data/languages/x86.dwarf
[Commit 2/2]
Hash: 29b7cb655283c124b4d999e8b3d45c58e7004b69
Date: 2025-08-07 15:19:32 +0000
Message: GP-5915 Fix bug in ConditionalJoin
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/block.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/block.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/blockaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/typeop.cc
```
* Fix some patches and rename test binary
* Bump Ghidra HEAD commit 42794bc3f
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/.gitignore
M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/heritage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slghsymbol.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/stringmanage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/transform.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
```
Commit details:
```
[Commit 1/1]
Hash: 943ccd322ddc280cd28cb7cb6ef8328941c3d574
Date: 2025-07-23 22:49:35 +0000
Message: GP-5869 Fix for some out of bounds array indices and shift amounts
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/.gitignore
M Ghidra/Features/Decompiler/src/decompile/cpp/Makefile
M Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/heritage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/jumptable.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/opbehavior.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/slghsymbol.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/stringmanage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/transform.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
```
---------
Co-authored-by: Eric Kilmer <eric.d.kilmer@gmail.com>
Bump Ghidra HEAD commit 0a97fd8fe
Changed files:
```
M Ghidra/Processors/ARM/data/languages/ARMneon.sinc
M Ghidra/Processors/HCS08/data/languages/HCS_HC.sinc
M Ghidra/Processors/MC6800/data/languages/6805.slaspec
M Ghidra/Processors/SuperH4/data/languages/SuperH4.sinc
M Ghidra/Processors/SuperH4/data/languages/SuperH4_le.cspec
M Ghidra/Processors/Toy/certification.manifest
M Ghidra/Processors/Toy/data/languages/toy.ldefs
M Ghidra/Processors/Toy/data/languages/toy.sinc
A Ghidra/Processors/Toy/data/languages/toy64_be_harvard_rev.slaspec
M Ghidra/Processors/eBPF/certification.manifest
M Ghidra/Processors/eBPF/data/languages/eBPF.ldefs
M Ghidra/Processors/eBPF/data/languages/eBPF.opinion
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
A Ghidra/Processors/eBPF/data/languages/eBPF_be.slaspec
M Ghidra/Processors/eBPF/data/languages/eBPF_le.slaspec
M Ghidra/Processors/x86/data/languages/avx512.sinc
M Ghidra/Processors/x86/data/languages/ia.sinc
```
Commit details:
```
[Commit 1/15]
Hash: 352fed0d953aacf3ee6304516b4679c134c9a0f5
Date: 2025-07-29 14:32:54 +0000
Message: GP-5853: Initial implementation of ARM Neon VLD/VSTn instructions.
Files changed:
M Ghidra/Processors/ARM/data/languages/ARMneon.sinc
[Commit 2/15]
Hash: 4abf6d55ad54a91afb9adf5e9e122302e4ca10f8
Date: 2025-07-29 07:12:56 -0400
Message: GP-5766: Fixed instruction AVX512 disassembly errors
Files changed:
M Ghidra/Processors/x86/data/languages/avx512.sinc
M Ghidra/Processors/x86/data/languages/ia.sinc
[Commit 3/15]
Hash: 24d19f6e8c31c038345fb33d3a957fe990222ea2
Date: 2025-04-04 17:54:31 +0200
Message: Add eBPF ISA v4 instructions
Details:
In 2023, the eBPF instruction set was modified to add several
instructions related to signed operations (load with sign-extension,
signed division, etc.), a 32-bit jump instruction and some byte-swap
instructions. This became version 4 of eBPF ISA.
Here are some references about this change:
- https://pchaigno.github.io/bpf/2021/10/20/ebpf-instruction-sets.html
(a blog post about eBPF instruction set extensions)
- https://lore.kernel.org/bpf/4bfe98be-5333-1c7e-2f6d-42486c8ec039@meta.com/
(documentation sent to Linux Kernel mailing list)
- https://www.rfc-editor.org/rfc/rfc9669.html#name-sign-extension-load-operati
(IETF's BPF Instruction Set Architecture standard defined the new
instructions)
- https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/core.c?h=v6.14#n1859
(implementation of signed division and remainder in Linux kernel.
This shows that 32-bit signed DIV and signed MOD are zero-extending
the result in DST)
- https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/core.c?h=v6.14#n2135
(implementation of signed memory load in Linux kernel)
- https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1f9a1ea821ff25353a0e80d971e7958cd55b47a3
(commit which added signed memory load instructions in Linux kernel)
This can be tested with a recent enough version of clang and LLVM (this
works with clang 19.1.4 on Alpine 3.21).
For example for signed memory load instructions:
signed int sext_8bit(signed char x) {
return x;
}
produces:
$ clang -O0 -target bpf -mcpu=v4 -c test.c -o test.ebpf
$ llvm-objdump -rd test.ebpf
...
0000000000000000 <sext_8bit>:
0: 73 1a ff ff 00 00 00 00 *(u8 *)(r10 - 0x1) = r1
1: 91 a1 ff ff 00 00 00 00 r1 = *(s8 *)(r10 - 0x1)
2: bc 10 00 00 00 00 00 00 w0 = w1
3: 95 00 00 00 00 00 00 00 exit
(The second instruction is a signed memory load)
Instruction MOVS (Sign extend register MOV) uses offset to encode the
conversion (whether the source register is to be considered as signed
8-bit, 16-bit or 32-bit integer). The mnemonic for these instructions is
quite unclear:
- They are all named MOVS in the proposal
https://lore.kernel.org/bpf/4bfe98be-5333-1c7e-2f6d-42486c8ec039@meta.com/
- LLVM and Linux disassemblers only display pseudo-code (`r0 = (s8)r1`)
- RFC 9669 (https://datatracker.ietf.org/doc/rfc9669/) uses MOVSX for
all instructions.
- GCC uses MOVS for all instructions:
https://github.com/gcc-mirror/gcc/blob/releases/gcc-14.1.0/gcc/config/bpf/bpf.md?plain=1#L326-L365
To make the disassembled code clearer, decode such instructions with a
size suffix: MOVSB, MOVSH, MOVSW.
The decoding of instructions 32-bit JA, BSWAP16, BSWAP32 and BSWAP64 is
straightforward.
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
[Commit 4/15]
Hash: 39c0a83c0c4540b0776ef2e8fd8c2c7fb966d55c
Date: 2025-07-28 15:48:40 +0000
Message: GP-5877: Fix Patch Instruction action in some Harvard architectures.
Files changed:
M Ghidra/Processors/Toy/certification.manifest
M Ghidra/Processors/Toy/data/languages/toy.ldefs
M Ghidra/Processors/Toy/data/languages/toy.sinc
A Ghidra/Processors/Toy/data/languages/toy64_be_harvard_rev.slaspec
[Commit 5/15]
Hash: e2de11d5b284d17828b5513678d2de2a1c775cfe
Date: 2025-04-03 16:48:48 +0200
Message: Fix eBPF zero-extend load instructions
Details:
When a loading less than 8 bytes to a register, the value is supposed to
be zero-extended. This is what the eBPF execution engine in the Linux
kernel does, in
https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/bpf/core.c?h=v6.14#n2113
This is also what is specified in RFC 9669 which standardised BPF ISA:
https://www.rfc-editor.org/rfc/rfc9669.html#name-regular-load-and-store-oper
Add the missing `zext` calls in the semantic section of instructions
LDXW, LDXH and LDXB. While at it, add them to other load instructions.
For information, the issue can be seen when analyzing this C program:
unsigned int div_by_1000(unsigned int value) {
return value / 1000;
}
Compiling it with clang gives:
$ clang -O0 -target bpf -c division.c -o division.ebpf
$ bpf-objdump -rd division.ebpf
division.ebpf: file format elf64-bpfle
Disassembly of section .text:
0000000000000000 <div_by_1000>:
0: 63 1a fc ff 00 00 00 00 stxw [%fp+-4],%r1
8: 61 a0 fc ff 00 00 00 00 ldxw %r0,[%fp+-4]
10: 37 00 00 00 e8 03 00 00 div %r0,0x3e8
18: 95 00 00 00 00 00 00 00 exit
Ghidra decompiles this program as:
ulonglong div_by_1000(uint param_1)
{
undefined4 in_stack_00000000;
return CONCAT44(in_stack_00000000,param_1) / 1000;
}
This `in_stack_00000000` comes from the way the parameter is loaded from
the stack. The listing shows the following disassembly and p-code
operations:
ram:00100008 61 a0 fc ff 00 LDXW R0,[R10 + -0x4=>Stack[-0x4]]
00 00 00
$U3e00:8 = INT_ADD R10, -4:8
R0 = LOAD ram($U3e00:8)
This shows the value is indeed loaded from 8 bytes at `$U3e00:8` instead
of 4.
After adding `zext` calls, Ghidra decodes the same instruction as:
ram:00100008 61 a0 fc ff 00 LDXW R0,[R10 + -0x4=>local_4]
00 00 00
$U4100:8 = INT_ADD R10, -4:8
$U4180:4 = LOAD ram($U4100:8)
R0 = INT_ZEXT $U4180:4
This only loads 4 bytes from the stack, as expected.
Moreover the decompilation view is now correct:
ulonglong div_by_1000(uint param_1)
{
return (ulonglong)param_1 / 1000;
}
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
[Commit 6/15]
Hash: c1d96a214049944549c6429f994907f19de72acb
Date: 2025-03-18 22:24:23 +0100
Message: Fix eBPF CALL operand decoding
Details:
The operand of the CALL instruction missed multiplying the immediate
value by 8. Without this, calls are not decoded correctly.
Such a CALL instruction can be emitted when compiling this simple
`single_call.c` program:
static int one(void) {
return 1;
}
int call_one(void) {
return one();
}
with:
clang -O0 -target bpf -c single_call.c -o single_call.ebpf
Disassembling with LLVM shows:
$ llvm-objdump -d single_call.ebpf
single_call.ebpf: file format elf64-bpf
Disassembly of section .text:
0000000000000000 <call_one>:
0: 85 10 00 00 01 00 00 00 call 1
1: 95 00 00 00 00 00 00 00 exit
0000000000000010 <one>:
2: b7 00 00 00 01 00 00 00 r0 = 1
3: 95 00 00 00 00 00 00 00 exit
The first instruction ("call 1") calls the function located at 0x10 (at
index `2:` in the listing). Ghidra considered the call to target
address 9 instead (as `inst_next = 8` and `imm = 1`). Fix this by
multiplying `imm` by 8 when encountering a `disp32` operand (which is
only used by instruction `CALL`).
Adjust ELF Relocation R_BPF_64_32 to take into account for this
multiplication by 8. Actually it is documented to compute (S + A) / 8 - 1
so the division by 8 was missing.
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
[Commit 7/15]
Hash: adb0eac98aacb8b26d0f935e3f10974482d626a8
Date: 2025-05-07 15:40:24 +0200
Message: Add support for big endian eBPF programs
Files changed:
M Ghidra/Processors/eBPF/certification.manifest
M Ghidra/Processors/eBPF/data/languages/eBPF.ldefs
M Ghidra/Processors/eBPF/data/languages/eBPF.opinion
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
A Ghidra/Processors/eBPF/data/languages/eBPF_be.slaspec
[Commit 8/15]
Hash: 52cb7a36e685af547f0e2cc9782dc46755764c51
Date: 2025-04-04 22:00:34 +0200
Message: Fix the semantics of eBPF byte swap instructions
Details:
eBPF byte swap operations (BE16, BE32, BE64, LE16, LE32, LE64) have
semantics that depend on the endianness of the host processor executing
the eBPF program. For example, on a Little-Endian CPU, BE16 swaps the 2
lowest significant bytes of the given destination register.
The semantic section of LE16 contains:
{ dst=((dst) >> 8) | ((dst) << 8); }
This contains several issues:
- It assumes the instruction always swaps the bytes. This should only
happen on Big-Endian host CPU.
- If `dst` does not contain a 16-bit value (meaning `dst >> 16 != 0`),
the computed value is wrong. The value should be properly masked. For
example the Linux kernel defines in
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/uapi/linux/swab.h?h=v6.14#L14
#define ___constant_swab16(x) ((__u16)( \
(((__u16)(x) & (__u16)0x00ffU) << 8) | \
(((__u16)(x) & (__u16)0xff00U) >> 8)))
As the endianness of the CPU has to be the same as the eBPF program
(defined in the ELF header), introduce a macro `ENDIAN` and use it to
implement the byte swap operations.
Files changed:
M Ghidra/Processors/eBPF/data/languages/eBPF.sinc
M Ghidra/Processors/eBPF/data/languages/eBPF_le.slaspec
[Commit 9/15]
Hash: 997c64f6db8bc50c4f02f15a29d88f02a2dfeadc
Date: 2025-06-16 14:29:10 +0000
Message: GP-5759: Fixed token piece formatting
Files changed:
M Ghidra/Processors/SuperH4/data/languages/SuperH4.sinc
[Commit 10/15]
Hash: 24c0699a38246fea7e32900d54d2cfa3ae42358a
Date: 2025-05-23 15:08:01 +0300
Message: SuperH4: fix FSCA opcode destination location
Files changed:
M Ghidra/Processors/SuperH4/data/languages/SuperH4.sinc
[Commit 11/15]
Hash: 53d7e1608f5aeb680c53a08cf2a28ff932df5f19
Date: 2025-05-23 15:03:55 +0300
Message: SuperH4: fix fpu registers order
Files changed:
M Ghidra/Processors/SuperH4/data/languages/SuperH4_le.cspec
[Commit 12/15]
Hash: c86d9069c577f7a88f7ab59da1113fdd14ad7ff0
Date: 2024-10-29 19:31:21 +0000
Message: Update 6805.slaspec
Files changed:
M Ghidra/Processors/MC6800/data/languages/6805.slaspec
[Commit 13/15]
Hash: e04e47a7454df0c0e489e81311c8592ac418f279
Date: 2024-10-29 19:25:20 +0000
Message: Update HCS_HC.sinc
Details:
Incorporate fixes from PR
Files changed:
M Ghidra/Processors/HCS08/data/languages/HCS_HC.sinc
[Commit 14/15]
Hash: 67bfea173fc03dae728c07cc468e51e360b14367
Date: 2024-10-17 01:24:10 +0100
Message: Update HCS_HC.sinc
Details:
Fixes https://github.com/NationalSecurityAgency/ghidra/issues/7064 for 68HC05
Files changed:
M Ghidra/Processors/HCS08/data/languages/HCS_HC.sinc
[Commit 15/15]
Hash: 270e6867dbd0c6767acadae4ceecfd1728afe88a
Date: 2024-10-17 00:10:26 +0100
Message: Update 6805.slaspec
Details:
Fix for https://github.com/NationalSecurityAgency/ghidra/issues/7064 (incorrect handling of X-indexed JMP and JSR)
Files changed:
M Ghidra/Processors/MC6800/data/languages/6805.slaspec
```
Bump Ghidra HEAD commit 7e6c01f28
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/flow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/flow.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_op.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.hh
A Ghidra/Features/Decompiler/src/decompile/datatests/inlinetarget.xml
M Ghidra/Processors/MIPS/data/patterns/MIPS_BE_patterns.xml
M Ghidra/Processors/MIPS/data/patterns/MIPS_LE_patterns.xml
```
Commit details:
```
[Commit 1/5]
Hash: fc4b7800251f59395e1ddc9bb85e932c69e00a65
Date: 2025-06-04 19:56:49 +0000
Message: GP-5736 prevent constant propagation from making RETURN inputs constant (Closes#8183)
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
[Commit 2/5]
Hash: cc0203307d6b0347cae04f4794798633e36567af
Date: 2025-07-23 17:31:18 +0000
Message: GP-5863 Check for input intersection before creating unreferenced param
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/coreaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.hh
[Commit 3/5]
Hash: c4c7aa5dad6eb651e76d86d0d1a7a5c2ad6ded61
Date: 2025-07-21 19:40:05 +0000
Message: Fix for infinite loop caused by RulePtrsubUndo
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/type.cc
[Commit 4/5]
Hash: 3468c4b5025ff936080e56163b4fc155a538ed83
Date: 2025-07-17 22:42:00 +0000
Message: GP-5843 Added MIPS64 function start patterns
Files changed:
M Ghidra/Processors/MIPS/data/patterns/MIPS_BE_patterns.xml
M Ghidra/Processors/MIPS/data/patterns/MIPS_LE_patterns.xml
[Commit 5/5]
Hash: 80d66023a974d775e97f770b826d800c1de42461
Date: 2025-07-16 18:29:53 +0000
Message: GP-5832 Update inline target op when inlining a subfunction
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/flow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/flow.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_op.cc
A Ghidra/Features/Decompiler/src/decompile/datatests/inlinetarget.xml
```
Co-authored-by: pgoodman <43664+pgoodman@users.noreply.github.com>
Bump Ghidra HEAD commit 12a8db619
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Processors/ARM/data/languages/ARM.cspec
M Ghidra/Processors/ARM/data/languages/ARM_win.cspec
M Ghidra/Processors/Atmel/data/languages/avr8gcc.cspec
M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv32.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64.cspec
```
Commit details:
```
[Commit 1/5]
Hash: 991a4b440c6fe2073ede634359afff2da8e174c8
Date: 2025-07-16 20:22:28 +0000
Message: GP-4356: fixes to avr8 cspec and elf extension, and additions to decompiler model rules
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh
M Ghidra/Processors/Atmel/data/languages/avr8gcc.cspec
[Commit 2/5]
Hash: f26d36c6bb961271fe7fd77a734bd4010c6a210c
Date: 2025-07-16 16:38:27 +0000
Message: GP-5211: Fix RISCV 32- and 64-bit compiler specifications and relocation handler
Files changed:
M Ghidra/Processors/RISCV/data/languages/riscv32-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv32.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64-fp.cspec
M Ghidra/Processors/RISCV/data/languages/riscv64.cspec
[Commit 3/5]
Hash: 3e117157787f79f842f72d82641426ab9d4b9a28
Date: 2025-07-14 18:38:17 +0000
Message: GP-4989: Fix ARM AAPCS cspec, add soft float calling convention
Files changed:
M Ghidra/Processors/ARM/data/languages/ARM.cspec
M Ghidra/Processors/ARM/data/languages/ARM_win.cspec
[Commit 4/5]
Hash: 3067d3e61f98d195060be8c2ee65922d16bd29f6
Date: 2025-07-14 17:21:02 +0000
Message: GP-5367: Filter by max_primitives on homogeneous aggregate types in cspec
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/marshal.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/modelrules.hh
[Commit 5/5]
Hash: b3f4609330128138f3246359bdb834ac7604e81d
Date: 2025-05-23 19:10:25 +0000
Message: GP-5718 fix for index issue
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
```
* ci: Enforce passing tests on HEAD
* Bump Ghidra HEAD commit e63d97b11
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/Doxyfile
M Ghidra/Features/Decompiler/src/decompile/cpp/inject_sleigh.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/inject_sleigh.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc
M Ghidra/Features/Decompiler/src/decompile/datatests/retstruct.xml
M Ghidra/Processors/AARCH64/data/languages/AARCH64.cspec
M Ghidra/Processors/AARCH64/data/languages/AARCH64_win.cspec
```
Commit details:
```
[Commit 1/1]
Hash: de842dbd32b0f27d9d7f222f039f6c8ebfa87598
Date: 2025-07-09 21:14:59 +0000
Message: GP-5816 Fix return recovery for AARCH64 and ARM
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/Doxyfile
M Ghidra/Features/Decompiler/src/decompile/cpp/inject_sleigh.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/inject_sleigh.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/varnode.cc
M Ghidra/Features/Decompiler/src/decompile/datatests/retstruct.xml
M Ghidra/Processors/AARCH64/data/languages/AARCH64.cspec
M Ghidra/Processors/AARCH64/data/languages/AARCH64_win.cspec
```
---------
Co-authored-by: Eric Kilmer <eric.d.kilmer@gmail.com>
Bump Ghidra HEAD commit 65b290624
Changed files:
```
M Ghidra/Processors/x86/data/languages/old/x86RealV1.lang
M Ghidra/Processors/x86/data/languages/old/x86RealV2.lang
M Ghidra/Processors/x86/data/languages/old/x86RealV3.lang
M Ghidra/Processors/x86/data/languages/old/x86_ProtV2.lang
M Ghidra/Processors/x86/data/languages/old/x86_ProtV3.lang
M Ghidra/Processors/x86/data/languages/old/x86smmV1.lang
M Ghidra/Processors/x86/data/languages/old/x86smmV2.lang
M Ghidra/Processors/x86/data/languages/old/x86smmV3.lang
```
Commit details:
```
[Commit 1/1]
Hash: 271ec694ad598cf6569c8d273cc0424c49b2571e
Date: 2025-05-19 16:01:16 -0400
Message: GP-5704 Corrected language upgrade issue affecting x86-16 Protected and SMM mode variants.
Files changed:
M Ghidra/Processors/x86/data/languages/old/x86RealV1.lang
M Ghidra/Processors/x86/data/languages/old/x86RealV2.lang
M Ghidra/Processors/x86/data/languages/old/x86RealV3.lang
M Ghidra/Processors/x86/data/languages/old/x86_ProtV2.lang
M Ghidra/Processors/x86/data/languages/old/x86_ProtV3.lang
M Ghidra/Processors/x86/data/languages/old/x86smmV1.lang
M Ghidra/Processors/x86/data/languages/old/x86smmV2.lang
M Ghidra/Processors/x86/data/languages/old/x86smmV3.lang
```
Bump Ghidra HEAD commit 4a46edc9f
Changed files:
```
M Ghidra/Features/Decompiler/src/decompile/cpp/action.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/architecture.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/block.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/blockaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/database.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/database.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/heritage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/merge.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/rangeutil.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/stringmanage.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.hh
M Ghidra/Processors/SuperH4/data/languages/SuperH4.sinc
```
Commit details:
```
[Commit 1/3]
Hash: 6730154316df215c1c4125039c083e5d02d475b8
Date: 2025-04-21 07:54:19 -0400
Message: GP-0: Certify
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/action.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/blockaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/database.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/database.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/rangeutil.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/stringmanage.hh
[Commit 2/3]
Hash: 830306162955c3bffaffa5d0c65d85f0dc49cc99
Date: 2025-04-19 18:06:41 +0200
Message: Many typo's These were found using the command below searching for duplicated words, and manually going through the results to remove the false positives and reword the true positives. Sometimes I removed the doubled word and sometimes I replaced the duplicated word.
Details:
The grep command:
grep -nIEr '\b([a-zA-Z]+)[[:space:]*]+\1\b' ./Ghidra
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/action.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/address.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/architecture.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/block.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/blockaction.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/constseq.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/database.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/database.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/heritage.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/merge.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/prettyprint.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/printc.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/rangeutil.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/ruleaction.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/stringmanage.hh
M Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
M Ghidra/Features/Decompiler/src/decompile/cpp/type.hh
M Ghidra/Processors/SuperH4/data/languages/SuperH4.sinc
[Commit 3/3]
Hash: b7e91e80a2cc8e54bf54f28a8551bd8378b30d90
Date: 2025-04-19 17:20:51 +0200
Message: Fix various "function" typos
Files changed:
M Ghidra/Features/Decompiler/src/decompile/cpp/fspec.hh
```
Can now compare arbitrary commits/tags in Ghidra to collect all changes
between versions. This could be used to backfill or create a page with
all commit information between official version releases or keep running
tabs on changes introduced in HEAD.
Was testing out Cursor and LLM abilities to code this. Seemed to work
decently well!
Used Cursor v0.46.11 with claude-3.7-sonnet-thinking Agent mode with context
files:
- scripts/update_ghidra_head.py
and the following prompt (in the same chat as the parent commit):
---------------------
Please reduce code duplication when appropriate
Used Cursor v0.46.11 with claude-3.7-sonnet-thinking Agent mode with context
files:
- scripts/update_ghidra_head.py
and the following prompt:
---------------------
Please add an option to allow the user to specify begin and end commits, such
that the script does not read from or update the CMake file and requires
specifying an existing Ghidra git repository. For instance, it would look
something like the following, where `Ghidra_11.3_build` and `Ghidra_11.3.1_build`
are starting and ending commit, respectively.
```
python3 ./scripts/update_ghidra_head.py --ghidra-repo ./src/ghidra-HEAD Ghidra_11.3_build Ghidra_11.3.1_build
```
I also want it to support where only a starting commit is provided, and it shows
the commits from start to the current commit specified by `--ghidra-repo` path.
This also shouldn't update anything
```
python3 ./scripts/update_ghidra_head.py --ghidra-repo ./src/ghidra-HEAD Ghidra_11.3_build
```
Used Cursor v0.46.11 with claude-3.7-sonnet-thinking Agent mode with context
files:
- scripts/update_ghidra_head.py
- .github/workflows/main.yml
and the following prompt:
---------------------
Please refine the Python script to be more succinct, easier to understand, and
extendable. Use professional Python 3 constructs, syntax, and design. Do not
overcomplicate it. This script is standalone and won't be integrated into a
larger project.
Bump Ghidra HEAD commit 13834faba
Changed files:
```
M Ghidra/Processors/ARM/data/languages/ARM.cspec
M Ghidra/Processors/ARM/data/languages/ARM.sinc
M Ghidra/Processors/ARM/data/languages/ARM_v45.cspec
M Ghidra/Processors/ARM/data/languages/ARM_win.cspec
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
M Ghidra/Processors/MC6800/data/languages/6x09.sinc
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
M Ghidra/Processors/x86/data/languages/ia.sinc
M Ghidra/Processors/x86/data/languages/lockable.sinc
M Ghidra/Processors/x86/data/languages/x86.ldefs
```
Commit details:
```
[Commit 1/5]
Hash: 41305fb45e91070800d2f0f58f49b2ba3010218a
Date: 2025-04-10 14:46:25 -0400
Message: GP-5011: Fixed x86 stack push/pop sizing issues
Files changed:
M Ghidra/Processors/x86/data/languages/ia.sinc
[Commit 2/5]
Hash: 30008b6715aeadc478c5861846d502804aa74003
Date: 2025-04-09 10:04:02 -0400
Message: GP-5030 improved x87 operand display
Files changed:
M Ghidra/Processors/x86/data/languages/ia.sinc
M Ghidra/Processors/x86/data/languages/lockable.sinc
M Ghidra/Processors/x86/data/languages/x86.ldefs
[Commit 3/5]
Hash: b702aa0a6f43eacf066ca194b8bce1794378ce53
Date: 2025-04-04 16:18:36 +0000
Message: GP-5301: Fix ARM/THUMB ISA mode switching for indirect branches in JIT.
Files changed:
M Ghidra/Processors/ARM/data/languages/ARM.cspec
M Ghidra/Processors/ARM/data/languages/ARM.sinc
M Ghidra/Processors/ARM/data/languages/ARM_v45.cspec
M Ghidra/Processors/ARM/data/languages/ARM_win.cspec
M Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
[Commit 4/5]
Hash: 96c1ec0970ec1799d11661acde976bd1c7cbdb8a
Date: 2024-11-15 16:14:12 +0000
Message: GP-5131: Fixed MIPS16e instruction delayslot relative addressing
Files changed:
M Ghidra/Processors/MIPS/data/languages/mips16.sinc
[Commit 5/5]
Hash: 387c283e8953d28f8f44e8776734c405793e1d1f
Date: 2024-03-14 07:33:47 +0200
Message: Github issue #5767 - 6x09.sinc: Fix COM instruction
Details:
The complement macro was erroneously always complementing A register
instead of the macro parameter op. This caused errors with the COMB
and COM OP1 instructions.
Closes#5767.
Files changed:
M Ghidra/Processors/MC6800/data/languages/6x09.sinc
```
Changed files:
```
M Ghidra/Processors/AARCH64/data/languages/AARCH64_golang.cspec
M Ghidra/Processors/AARCH64/data/languages/AARCH64_golang.register.info
M Ghidra/Processors/x86/data/languages/x86-32-golang.cspec
M Ghidra/Processors/x86/data/languages/x86-32-golang.register.info
M Ghidra/Processors/x86/data/languages/x86-64-golang.cspec
M Ghidra/Processors/x86/data/languages/x86-64-golang.register.info
```
Commit details:
```
[Commit 1/1]
Hash: 36c6c8ef77c20b7d1b29ae2b4cee501c2d01fbd2
Date: 2024-11-12 10:36:35 -0500
Message: GP-2432 golang api snapshot, generics, closures, gcwritebarrier
Details:
Apply golang runtime function signatures from info stored in json api
snapshot files.
The api snapshot files are created by a custom go helper program that
uses the go compiler parser to parse the go toolchain source tree and
writes the discovered function and type info into a json file.
The go-api-parser helper program is based off of work contributed by
github user monoidic via issue #6367.
Updates generic functions to take a generic dictionary RTTI
parameter (mostly to allow correct assignment of other parameters).
Updates closure functions to take a closure context parameter. Closure
contexts are passed via a register that is not involved in normal
parameter passing.
Tweaks the signature of gcWriteBarrier functions so that they don't mess
up decompilation of functions that use them.
Files changed:
M Ghidra/Processors/AARCH64/data/languages/AARCH64_golang.cspec
M Ghidra/Processors/AARCH64/data/languages/AARCH64_golang.register.info
M Ghidra/Processors/x86/data/languages/x86-32-golang.cspec
M Ghidra/Processors/x86/data/languages/x86-32-golang.register.info
M Ghidra/Processors/x86/data/languages/x86-64-golang.cspec
M Ghidra/Processors/x86/data/languages/x86-64-golang.register.info
```
Add CMAKE_MSVC_DEBUG_INFORMATION_FORMAT=Embedded to CI line
- Needs to be before the first project call
Set required CMake Policy for MSVC ccache debug type
2025-03-12 16:51:19 -04:00
37 changed files with 2168 additions and 719 deletions
# Use oldest supported version for maximum script compatibility
python-version:'3.10'
@@ -26,33 +26,90 @@ jobs:
python3 scripts/update_ghidra_head.py --ci
# Need this to run further Actions on the newly created PR
# See here for more details https://github.com/peter-evans/create-pull-request/blob/28fa4848947e0faa7fa50647691d01477589d5e9/docs/concepts-guidelines.md#authenticating-with-github-app-generated-tokens
- uses:tibdex/github-app-token@v2
# See here for more details https://github.com/peter-evans/create-pull-request/blob/main/docs/concepts-guidelines.md#authenticating-with-github-app-generated-tokens
- uses:actions/create-github-app-token@v2
if:steps.head_update.outputs.did_update
id:generate-token
with:
app_id:${{ secrets.APP_ID }}
private_key:${{ secrets.APP_PRIVATE_KEY }}
app-id:${{ secrets.APP_ID }}
private-key:${{ secrets.APP_PRIVATE_KEY }}
- name:Create PR
- name:Commit, push, and create PR
if:steps.head_update.outputs.did_update
uses:peter-evans/create-pull-request@v7
with:
title:Update Ghidra HEAD to commit ${{ steps.head_update.outputs.short_sha }}
commit-message:|
Bump Ghidra HEAD commit ${{ steps.head_update.outputs.short_sha }}
This file provides guidance to Claude Code (claude.ai/code) when working with code in this repository.
## Project Overview
Sleigh is a CMake-based build system for Ghidra's Sleigh/decompiler C++ libraries (by Trail of Bits). It wraps NSA's Ghidra source code — fetched via CMake FetchContent during configure — so the Sleigh disassembly and decompilation engines can be built as standalone C++ libraries for reuse outside Ghidra.
**The actual Ghidra C++ source is not in this repo.** It is cloned from GitHub automatically during CMake configuration.
## Build Commands
```sh
# Standard build (fetches Ghidra source on first configure)
cmake -B build -S .
cmake --build build -j$(nproc)
# CI-style build with developer mode (enables tests, docs, warnings)
cmake --preset=ci-ubuntu
cmake --build build -j$(nproc)
# Build with HEAD (bleeding-edge) Ghidra instead of stable
Test binary: `sleigh_decomp_test` — wraps Ghidra's own test suite. Takes `-sleighpath` for compiled .sla files and a test mode (`unittests` or `datatests`).
| `sleigh::decomp` | `decomp` | C++11 | Full decompiler (superset of sla) |
| `sleigh::support` | `slaSupport` | C++17 | Trail of Bits helpers: `FindSpecFile()`, version info |
Headers: `<ghidra/*.hh>` for upstream Ghidra headers, `<sleigh/*.h>` for ToB additions.
### Key Directories
-`src/setup-ghidra-source.cmake` — Pinned Ghidra versions, FetchContent, source file lists, patch application. **This is the central file for version bumps and source management.**
-`src/patches/{stable,HEAD}/` — Git-format patches applied to Ghidra source during fetch
-`src/spec_files_{stable,HEAD}.cmake` — Lists of ~148 .slaspec files to compile
When adding patches: create with `git format-patch`, number sequentially, and add to both directories if applicable. Patches in HEAD must be a superset of stable patches.
## Key Gotchas
- **In-source builds are forbidden** — enforced by `cmake/prelude.cmake`
- **First configure is slow** — Ghidra repo clone takes time (especially HEAD which can't shallow clone)
- **Core libraries are C++11** — the support library and extra tools are C++17, but `sleigh::sla` and `sleigh::decomp` must stay C++11
- **Source file lists are manual** — when Ghidra adds/removes .cc files, `src/setup-ghidra-source.cmake` must be updated; the `scripts/update_ghidra_head.py` script detects new files and flags them
- **Strict weak ordering** — a recurring class of upstream bugs in Ghidra comparators; several patches fix these
- **Spec files differ between releases** — `src/spec_files_stable.cmake` and `src/spec_files_HEAD.cmake` are separate lists and must be maintained independently
## CMake Presets Reference
| Preset | Use Case |
|--------|----------|
| `ci-ubuntu` | Linux dev build with warnings and tests |
| `ci-macos` | macOS dev build |
| `ci-windows` | Windows dev build (VS 2022, vcpkg) |
| `ci-sanitize` | ASan + UBSan (builds to `build/sanitize/`) |
| `ci-coverage` | Code coverage (builds to `build/coverage/`) |
## Code Style
-`.clang-format`: BasedOnStyle LLVM
- Compiler warnings are strict in CI (see `flags-unix`/`flags-windows` presets)
[Sleigh](https://ghidra.re/courses/languages/html/sleigh.html) is a language used to describe the semantics of instruction sets of general-purpose microprocessors, with enough detail to facilitate the reverse engineering of software compiled for these architectures. It is part of the [Ghidra reverse engineering platform](https://github.com/NationalSecurityAgency/ghidra) and underpins two of its major components: its disassembly and decompilation engines.
[Sleigh](https://ghidra.re/ghidra_docs/languages/html/sleigh.html) is a language used to describe the semantics of instruction sets of general-purpose microprocessors, with enough detail to facilitate the reverse engineering of software compiled for these architectures. It is part of the [Ghidra reverse engineering platform](https://github.com/NationalSecurityAgency/ghidra) and underpins two of its major components: its disassembly and decompilation engines.
This repository provides a CMake-based build project for Sleigh so that it can be built and packaged as a standalone library and be reused in projects other than Ghidra.
Blocking a user prevents them from interacting with repositories, such as opening or commenting on pull requests or issues. Learn more about blocking a user.